realtek: mdio: adapt command function signature

To make use of regmap in the command function adapt its signature
so it has access to the control structure via the bus.

Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/21741
Signed-off-by: Robert Marko <robimarko@gmail.com>

diff --git a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
index a698852a90e015cd9b49e1038719eeea8134b017..2eaaafa084622aa1fd13dbc1ffa271b0588a52e4 100644 (file)
--- a/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
+++ b/target/linux/realtek/files-6.12/drivers/net/mdio/mdio-realtek-otto.c
@@ -206,7 +206,7 @@ struct rtmdio_phy_info {
        unsigned int poll_lpa_1000;
 };
 
-static int rtmdio_run_cmd(int cmd, int mask, int regnum, int fail)
+static int rtmdio_run_cmd(struct mii_bus *bus, int cmd, int mask, int regnum, int fail)
 {
        int ret, val;
 
@@ -224,9 +224,9 @@ static int rtmdio_run_cmd(int cmd, int mask, int regnum, int fail)
 
 /* RTL838x specific MDIO functions */
 
-static int rtmdio_838x_run_cmd(int cmd)
+static int rtmdio_838x_run_cmd(struct mii_bus *bus, int cmd)
 {
-       return rtmdio_run_cmd(cmd, RTMDIO_838X_CMD_MASK,
+       return rtmdio_run_cmd(bus, cmd, RTMDIO_838X_CMD_MASK,
                              RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1, RTMDIO_838X_CMD_FAIL);
 }
 
@@ -238,7 +238,7 @@ static int rtmdio_838x_read_phy(struct mii_bus *bus, u32 port, u32 page, u32 reg
 
        sw_w32_mask(0xffff0000, port << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
        sw_w32(reg << 20 | page << 3 | park_page << 15, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1);
-       err = rtmdio_838x_run_cmd(RTMDIO_838X_CMD_READ_C22);
+       err = rtmdio_838x_run_cmd(bus, RTMDIO_838X_CMD_READ_C22);
        if (!err)
                *val = sw_r32(RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2) & 0xffff;
 
@@ -254,7 +254,7 @@ static int rtmdio_838x_write_phy(struct mii_bus *bus, u32 port, u32 page, u32 re
        sw_w32_mask(0xffff0000, val << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
        sw_w32(reg << 20 | page << 3 | park_page << 15, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_1);
 
-       return rtmdio_838x_run_cmd(RTMDIO_838X_CMD_WRITE_C22);
+       return rtmdio_838x_run_cmd(bus, RTMDIO_838X_CMD_WRITE_C22);
 }
 
 /* Read an mmd register of a PHY */
@@ -265,7 +265,7 @@ static int rtmdio_838x_read_mmd_phy(struct mii_bus *bus, u32 port, u32 addr, u32
        sw_w32(1 << port, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_0);
        sw_w32_mask(0xffff0000, port << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2);
        sw_w32(addr << 16 | reg, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3);
-       err = rtmdio_838x_run_cmd(RTMDIO_838X_CMD_READ_C45);
+       err = rtmdio_838x_run_cmd(bus, RTMDIO_838X_CMD_READ_C45);
        if (!err)
                *val = sw_r32(RTMDIO_838X_SMI_ACCESS_PHY_CTRL_2) & 0xffff;
 
@@ -280,14 +280,14 @@ static int rtmdio_838x_write_mmd_phy(struct mii_bus *bus, u32 port, u32 addr, u3
        sw_w32_mask(0x1f << 16, addr << 16, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3);
        sw_w32_mask(0xffff, reg, RTMDIO_838X_SMI_ACCESS_PHY_CTRL_3);
 
-       return rtmdio_838x_run_cmd(RTMDIO_838X_CMD_WRITE_C45);
+       return rtmdio_838x_run_cmd(bus, RTMDIO_838X_CMD_WRITE_C45);
 }
 
 /* RTL839x specific MDIO functions */
 
-static int rtmdio_839x_run_cmd(int cmd)
+static int rtmdio_839x_run_cmd(struct mii_bus *bus, int cmd)
 {
-       return rtmdio_run_cmd(cmd, RTMDIO_839X_CMD_MASK,
+       return rtmdio_run_cmd(bus, cmd, RTMDIO_839X_CMD_MASK,
                              RTMDIO_839X_PHYREG_ACCESS_CTRL, RTMDIO_839X_CMD_FAIL);
 }
 
@@ -300,7 +300,7 @@ static int rtmdio_839x_read_phy(struct mii_bus *bus, u32 port, u32 page, u32 reg
        v = reg << 5 | page << 10 | ((page == 0x1fff) ? 0x1f : 0) << 23;
        sw_w32(v, RTMDIO_839X_PHYREG_ACCESS_CTRL);
        sw_w32(0x1ff, RTMDIO_839X_PHYREG_CTRL);
-       err = rtmdio_839x_run_cmd(RTMDIO_839X_CMD_READ_C22);
+       err = rtmdio_839x_run_cmd(bus, RTMDIO_839X_CMD_READ_C22);
        if (!err)
                *val = sw_r32(RTMDIO_839X_PHYREG_DATA_CTRL) & 0xffff;
 
@@ -318,7 +318,7 @@ static int rtmdio_839x_write_phy(struct mii_bus *bus, u32 port, u32 page, u32 re
        sw_w32(v, RTMDIO_839X_PHYREG_ACCESS_CTRL);
        sw_w32(0x1ff, RTMDIO_839X_PHYREG_CTRL);
 
-       return rtmdio_839x_run_cmd(RTMDIO_839X_CMD_WRITE_C22);
+       return rtmdio_839x_run_cmd(bus, RTMDIO_839X_CMD_WRITE_C22);
 }
 
 /* Read an mmd register of the PHY */
@@ -328,7 +328,7 @@ static int rtmdio_839x_read_mmd_phy(struct mii_bus *bus, u32 port, u32 devnum, u
 
        sw_w32_mask(0xffff << 16, port << 16, RTMDIO_839X_PHYREG_DATA_CTRL);
        sw_w32(devnum << 16 | (regnum & 0xffff), RTMDIO_839X_PHYREG_MMD_CTRL);
-       err = rtmdio_839x_run_cmd(RTMDIO_839X_CMD_READ_C45);
+       err = rtmdio_839x_run_cmd(bus, RTMDIO_839X_CMD_READ_C45);
        if (!err)
                *val = sw_r32(RTMDIO_839X_PHYREG_DATA_CTRL) & 0xffff;
 
@@ -343,14 +343,14 @@ static int rtmdio_839x_write_mmd_phy(struct mii_bus *bus, u32 port, u32 devnum,
        sw_w32_mask(0xffff << 16, val << 16, RTMDIO_839X_PHYREG_DATA_CTRL);
        sw_w32(devnum << 16 | (regnum & 0xffff), RTMDIO_839X_PHYREG_MMD_CTRL);
 
-       return rtmdio_839x_run_cmd(RTMDIO_839X_CMD_WRITE_C45);
+       return rtmdio_839x_run_cmd(bus, RTMDIO_839X_CMD_WRITE_C45);
 }
 
 /* RTL930x specific MDIO functions */
 
-static int rtmdio_930x_run_cmd(int cmd)
+static int rtmdio_930x_run_cmd(struct mii_bus *bus, int cmd)
 {
-       return rtmdio_run_cmd(cmd, RTMDIO_930X_CMD_MASK,
+       return rtmdio_run_cmd(bus, cmd, RTMDIO_930X_CMD_MASK,
                              RTMDIO_930X_SMI_ACCESS_PHY_CTRL_1, RTMDIO_930X_CMD_FAIL);
 }
 
@@ -363,7 +363,7 @@ static int rtmdio_930x_write_phy(struct mii_bus *bus, u32 port, u32 page, u32 re
        v = reg << 20 | page << 3 | 0x1f << 15 | BIT(2);
        sw_w32(v, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_1);
 
-       return rtmdio_930x_run_cmd(RTMDIO_930X_CMD_WRITE_C22);
+       return rtmdio_930x_run_cmd(bus, RTMDIO_930X_CMD_WRITE_C22);
 }
 
 static int rtmdio_930x_read_phy(struct mii_bus *bus, u32 port, u32 page, u32 reg, u32 *val)
@@ -374,7 +374,7 @@ static int rtmdio_930x_read_phy(struct mii_bus *bus, u32 port, u32 page, u32 reg
        sw_w32_mask(0xffff << 16, port << 16, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2);
        v = reg << 20 | page << 3 | 0x1f << 15;
        sw_w32(v, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_1);
-       err = rtmdio_930x_run_cmd(RTMDIO_930X_CMD_READ_C22);
+       err = rtmdio_930x_run_cmd(bus, RTMDIO_930X_CMD_READ_C22);
        if (!err)
                *val = (sw_r32(RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2) & 0xffff);
 
@@ -388,7 +388,7 @@ static int rtmdio_930x_write_mmd_phy(struct mii_bus *bus, u32 port, u32 devnum,
        sw_w32_mask(0xffff << 16, val << 16, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2);
        sw_w32(devnum << 16 | (regnum & 0xffff), RTMDIO_930X_SMI_ACCESS_PHY_CTRL_3);
 
-       return rtmdio_930x_run_cmd(RTMDIO_930X_CMD_WRITE_C45);
+       return rtmdio_930x_run_cmd(bus, RTMDIO_930X_CMD_WRITE_C45);
 }
 
 /* Read an mmd register of the PHY */
@@ -398,7 +398,7 @@ static int rtmdio_930x_read_mmd_phy(struct mii_bus *bus, u32 port, u32 devnum, u
 
        sw_w32_mask(0xffff << 16, port << 16, RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2);
        sw_w32(devnum << 16 | (regnum & 0xffff), RTMDIO_930X_SMI_ACCESS_PHY_CTRL_3);
-       err = rtmdio_930x_run_cmd(RTMDIO_930X_CMD_READ_C45);
+       err = rtmdio_930x_run_cmd(bus, RTMDIO_930X_CMD_READ_C45);
        if (!err)
                *val = (sw_r32(RTMDIO_930X_SMI_ACCESS_PHY_CTRL_2) & 0xffff);
 
@@ -407,9 +407,9 @@ static int rtmdio_930x_read_mmd_phy(struct mii_bus *bus, u32 port, u32 devnum, u
 
 /* RTL931x specific MDIO functions */
 
-static int rtmdio_931x_run_cmd(int cmd)
+static int rtmdio_931x_run_cmd(struct mii_bus *bus, int cmd)
 {
-       return rtmdio_run_cmd(cmd, RTMDIO_931X_CMD_MASK,
+       return rtmdio_run_cmd(bus, cmd, RTMDIO_931X_CMD_MASK,
                              RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_0, RTMDIO_931X_CMD_FAIL);
 }
 
@@ -422,7 +422,7 @@ static int rtmdio_931x_write_phy(struct mii_bus *bus, u32 port, u32 page, u32 re
        sw_w32(reg << 6 | page << 11, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_0);
        sw_w32(0x1ff, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_1);
 
-       return rtmdio_931x_run_cmd(RTMDIO_931X_CMD_WRITE_C22);
+       return rtmdio_931x_run_cmd(bus, RTMDIO_931X_CMD_WRITE_C22);
 }
 
 static int rtmdio_931x_read_phy(struct mii_bus *bus, u32 port, u32 page, u32 reg, u32 *val)
@@ -431,7 +431,7 @@ static int rtmdio_931x_read_phy(struct mii_bus *bus, u32 port, u32 page, u32 reg
 
        sw_w32(port << 5, RTMDIO_931X_SMI_INDRT_ACCESS_BC_CTRL);
        sw_w32(reg << 6 | page << 11, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_0);
-       err = rtmdio_931x_run_cmd(RTMDIO_931X_CMD_READ_C22);
+       err = rtmdio_931x_run_cmd(bus, RTMDIO_931X_CMD_READ_C22);
        if (!err)
                *val = sw_r32(RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_3) >> 16;
 
@@ -445,7 +445,7 @@ static int rtmdio_931x_read_mmd_phy(struct mii_bus *bus, u32 port, u32 devnum, u
 
        sw_w32(port << 5, RTMDIO_931X_SMI_INDRT_ACCESS_BC_CTRL);
        sw_w32(devnum << 16 | regnum, RTMDIO_931X_SMI_INDRT_ACCESS_MMD_CTRL);
-       err = rtmdio_931x_run_cmd(RTMDIO_931X_CMD_READ_C45);
+       err = rtmdio_931x_run_cmd(bus, RTMDIO_931X_CMD_READ_C45);
        if (!err)
                *val = sw_r32(RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_3) >> 16;
 
@@ -462,7 +462,7 @@ static int rtmdio_931x_write_mmd_phy(struct mii_bus *bus, u32 port, u32 devnum,
        sw_w32_mask(0xffff, val, RTMDIO_931X_SMI_INDRT_ACCESS_CTRL_3);
        sw_w32(devnum << 16 | regnum, RTMDIO_931X_SMI_INDRT_ACCESS_MMD_CTRL);
 
-       return rtmdio_931x_run_cmd(RTMDIO_931X_CMD_WRITE_C45);
+       return rtmdio_931x_run_cmd(bus, RTMDIO_931X_CMD_WRITE_C45);
 }
 
 /* These are the core functions of our new Realtek SoC MDIO bus. */