"pseries", /* VIR_ARCH_PPC64LE */
"bamboo", /* VIR_ARCH_PPCEMB */
- "spike_v1.10", /* VIR_ARCH_RISCV32 */
- "spike_v1.10", /* VIR_ARCH_RISCV64 */
+ "virt", /* VIR_ARCH_RISCV32 */
+ "virt", /* VIR_ARCH_RISCV64 */
NULL, /* VIR_ARCH_S390 (no QEMU impl) */
"s390-ccw-virtio", /* VIR_ARCH_S390X */
"shix", /* VIR_ARCH_SH4 */
<microcodeVersion>0</microcodeVersion>
<package>v5.0.0</package>
<arch>riscv64</arch>
- <machine type='tcg' name='spike_v1.10' maxCpus='1'/>
<machine type='tcg' name='virt' maxCpus='8' defaultCPU='rv64-riscv-cpu'/>
+ <machine type='tcg' name='spike_v1.10' maxCpus='1'/>
<machine type='tcg' name='spike' maxCpus='1' default='yes' defaultCPU='rv64gcsu-v1.10.0-riscv-cpu'/>
<machine type='tcg' name='sifive_e' maxCpus='1'/>
<machine type='tcg' name='sifive_u' maxCpus='5'/>
<microcodeVersion>0</microcodeVersion>
<package>v5.2.0</package>
<arch>riscv64</arch>
- <machine type='tcg' name='spike' maxCpus='8' default='yes' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes'/>
<machine type='tcg' name='virt' maxCpus='8' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes'/>
+ <machine type='tcg' name='spike' maxCpus='8' default='yes' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes'/>
<machine type='tcg' name='sifive_e' maxCpus='1' defaultCPU='sifive-e51-riscv-cpu'/>
<machine type='tcg' name='sifive_u' maxCpus='5' defaultCPU='sifive-u54-riscv-cpu'/>
<machine type='tcg' name='microchip-icicle-kit' maxCpus='5'/>
<microcodeVersion>0</microcodeVersion>
<package>v7.2.0-333-g222059a0fc</package>
<arch>riscv64</arch>
- <machine type='tcg' name='spike' maxCpus='8' default='yes' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes' defaultRAMid='riscv.spike.ram'/>
+ <machine type='tcg' name='virt' maxCpus='512' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes' defaultRAMid='riscv_virt_board.ram'/>
<machine type='tcg' name='x-remote' maxCpus='1'/>
+ <machine type='tcg' name='spike' maxCpus='8' default='yes' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes' defaultRAMid='riscv.spike.ram'/>
<machine type='tcg' name='microchip-icicle-kit' maxCpus='5' defaultRAMid='microchip.icicle.kit.ram'/>
<machine type='tcg' name='sifive_u' maxCpus='5' defaultCPU='sifive-u54-riscv-cpu' defaultRAMid='riscv.sifive.u.ram'/>
<machine type='tcg' name='shakti_c' maxCpus='1' defaultCPU='shakti-c-riscv-cpu' defaultRAMid='riscv.shakti.c.ram'/>
<machine type='tcg' name='sifive_e' maxCpus='1' defaultCPU='sifive-e51-riscv-cpu' defaultRAMid='riscv.sifive.e.ram'/>
- <machine type='tcg' name='virt' maxCpus='512' defaultCPU='rv64-riscv-cpu' numaMemSupported='yes' defaultRAMid='riscv_virt_board.ram'/>
</qemuCaps>