]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
Add extract_last for amdgcn
authorAndrew Stubbs <ams@codesourcery.com>
Tue, 17 Dec 2019 13:01:25 +0000 (13:01 +0000)
committerAndrew Stubbs <ams@gcc.gnu.org>
Tue, 17 Dec 2019 13:01:25 +0000 (13:01 +0000)
2019-12-17  Andrew Stubbs  <ams@codesourcery.com>

gcc/
* config/gcn/gcn-valu.md (extract_last_<mode>): New expander.
(fold_extract_last_<mode>): New expander.

gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_vect_fold_extract_last): Add amdgcn.

From-SVN: r279459

gcc/ChangeLog
gcc/config/gcn/gcn-valu.md
gcc/testsuite/ChangeLog
gcc/testsuite/lib/target-supports.exp

index 5c5b9f4b840546e6407b03a5d628d96f72c55840..161768c74055db6b20b4e1139e409c04a996b7ef 100644 (file)
@@ -1,3 +1,8 @@
+2019-12-17  Andrew Stubbs  <ams@codesourcery.com>
+
+       * config/gcn/gcn-valu.md (extract_last_<mode>): New expander.
+       (fold_extract_last_<mode>): New expander.
+
 2019-12-17  Andrew Stubbs  <ams@codesourcery.com>
 
        * config/gcn/gcn.h (CLZ_DEFINED_VALUE_AT_ZERO): Define.
index 42604466161c80db8c12e20a1bbc8a47f9af5ef4..3b3be8a9e368a5fd985530011d53060c6561d355 100644 (file)
    (set_attr "exec" "none")
    (set_attr "laneselect" "yes")])
 
+(define_expand "extract_last_<mode>"
+  [(match_operand:<SCALAR_MODE> 0 "register_operand")
+   (match_operand:DI 1 "gcn_alu_operand")
+   (match_operand:VEC_ALLREG_MODE 2 "register_operand")]
+  "can_create_pseudo_p ()"
+  {
+    rtx dst = operands[0];
+    rtx mask = operands[1];
+    rtx vect = operands[2];
+    rtx tmpreg = gen_reg_rtx (SImode);
+
+    emit_insn (gen_clzdi2 (tmpreg, mask));
+    emit_insn (gen_subsi3 (tmpreg, GEN_INT (63), tmpreg));
+    emit_insn (gen_vec_extract<mode><scalar_mode> (dst, vect, tmpreg));
+    DONE;
+  })
+
+(define_expand "fold_extract_last_<mode>"
+  [(match_operand:<SCALAR_MODE> 0 "register_operand")
+   (match_operand:<SCALAR_MODE> 1 "gcn_alu_operand")
+   (match_operand:DI 2 "gcn_alu_operand")
+   (match_operand:VEC_ALLREG_MODE 3 "register_operand")]
+  "can_create_pseudo_p ()"
+  {
+    rtx dst = operands[0];
+    rtx default_value = operands[1];
+    rtx mask = operands[2];
+    rtx vect = operands[3];
+    rtx else_label = gen_label_rtx ();
+    rtx end_label = gen_label_rtx ();
+
+    rtx cond = gen_rtx_EQ (VOIDmode, mask, const0_rtx);
+    emit_jump_insn (gen_cbranchdi4 (cond, mask, const0_rtx, else_label));
+    emit_insn (gen_extract_last_<mode> (dst, mask, vect));
+    emit_jump_insn (gen_jump (end_label));
+    emit_barrier ();
+    emit_label (else_label);
+    emit_move_insn (dst, default_value);
+    emit_label (end_label);
+    DONE;
+  })
+
 (define_expand "vec_init<mode><scalar_mode>"
   [(match_operand:VEC_ALLREG_MODE 0 "register_operand")
    (match_operand 1)]
index 5fff39ec7fe398b6823b6c8107535448a7921bc4..28b7400dfd7dac5884b1529cc120138fd6f4ec20 100644 (file)
@@ -1,3 +1,8 @@
+2019-12-17  Andrew Stubbs  <ams@codesourcery.com>
+
+       * lib/target-supports.exp
+       (check_effective_target_vect_fold_extract_last): Add amdgcn.
+
 2019-12-17  Hongyu Wang  <hongyu.wang@intel.com>
 
        * gcc.target/i386/pr92651.c: New testcase.
index 80e9d6720bd167180dcc11344396db5b2895820e..98f1141a8a4e5b55c58c4512d93f280fe675e601 100644 (file)
@@ -6974,7 +6974,8 @@ proc check_effective_target_vect_logical_reduc { } {
 # Return 1 if the target supports the fold_extract_last optab.
 
 proc check_effective_target_vect_fold_extract_last { } {
-    return [check_effective_target_aarch64_sve]
+    return [expr { [check_effective_target_aarch64_sve]
+                  || [istarget amdgcn*-*-*] }]
 }
 
 # Return 1 if the target supports section-anchors