* arm.md (movsfcc, movdfcc): Fix "patch" lossage.

From-SVN: r16822

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 8421bb23d1d47bcd4ff447a0a8dee8c575ee7bbf..edb0ef02bb9e1f65aeb2c77f3f862b5857e88989 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,7 @@
 Fri Nov 28 10:00:27 1997  Jeffrey A Law  (law@cygnus.com)
 
+       * arm.md (movsfcc, movdfcc): Fix "patch" lossage.
+
        * configure.in: Fix NCR entries.
 
 Thu Nov 27 12:20:19 1997  Jeffrey A Law  (law@cygnus.com)

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index f2987403a2137e436453e02a5e8f6f810e035114..9be04414358b7915522000192d5d644736931b89 100644 (file)
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -3859,8 +3859,14 @@
   "
 {
   enum rtx_code code = GET_CODE (operands[1]);
-  rtx ccreg = gen_compare_reg (code, arm_compare_op0, arm_compare_op1,
-                              arm_compare_fp);
+  rtx ccreg;
+
+  /* When compiling for SOFT_FLOAT, ensure both arms are in registers.  */
+  if (! TARGET_HARD_FLOAT)
+    operands[3] = force_reg (SFmode, operands[3]);
+
+  ccreg = gen_compare_reg (code, arm_compare_op0, arm_compare_op1,
+                          arm_compare_fp);
 
   operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
 }")
@@ -3874,14 +3880,8 @@
   "
 {
   enum rtx_code code = GET_CODE (operands[1]);
-  rtx ccreg;
-
-  /* When compiling for SOFT_FLOAT, ensure both arms are in registers.  */
-  if (! TARGET_HARD_FLOAT)
-    operands[3] = force_reg (SFmode, operands[3]);
-
-  ccreg = gen_compare_reg (code, arm_compare_op0, arm_compare_op1,
-                          arm_compare_fp);
+  rtx ccreg = gen_compare_reg (code, arm_compare_op0, arm_compare_op1,
+                              arm_compare_fp);
 
   operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
 }")