iommu/amd: KVM: SVM: Allow KVM to control need for GA log interrupts

Add plumbing to the AMD IOMMU driver to allow KVM to control whether or
not an IRTE is configured to generate GA log interrupts.  KVM only needs a
notification if the target vCPU is blocking, so the vCPU can be awakened.
If a vCPU is preempted or exits to userspace, KVM clears is_run, but will
set the vCPU back to running when userspace does KVM_RUN and/or the vCPU
task is scheduled back in, i.e. KVM doesn't need a notification.

Unconditionally pass "true" in all KVM paths to isolate the IOMMU changes
from the KVM changes insofar as possible.

Opportunistically swap the ordering of parameters for amd_iommu_update_ga()
so that the match amd_iommu_activate_guest_mode().

Note, as of this writing, the AMD IOMMU manual doesn't list GALogIntr as
a non-cached field, but per AMD hardware architects, it's not cached and
can be safely updated without an invalidation.

Link: https://lore.kernel.org/all/b29b8c22-2fd4-4b5e-b755-9198874157c7@amd.com
Cc: Vasant Hegde <vasant.hegde@amd.com>
Cc: Joao Martins <joao.m.martins@oracle.com>
Link: https://lore.kernel.org/r/20250611224604.313496-62-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>

diff --git a/arch/x86/include/asm/irq_remapping.h b/arch/x86/include/asm/irq_remapping.h
index 4c75a17632f6068ed30aaf7eb0e0402cf72ff01d..5a0d42464d44247fa77e4561b19755f5d07bcfa7 100644 (file)
--- a/arch/x86/include/asm/irq_remapping.h
+++ b/arch/x86/include/asm/irq_remapping.h
@@ -36,6 +36,7 @@ struct amd_iommu_pi_data {
        u32 ga_tag;
        u32 vector;             /* Guest vector of the interrupt */
        int cpu;
+       bool ga_log_intr;
        bool is_guest_mode;
        void *ir_data;
 };

diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c
index 5803f778999f451f421cc3cf7de62a04b6d3d146..02f266901bfe277e13bf66567da40c7283773d35 100644 (file)
--- a/arch/x86/kvm/svm/avic.c
+++ b/arch/x86/kvm/svm/avic.c
@@ -785,10 +785,12 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd, struct kvm *kvm,
                 * is awakened and/or scheduled in.  See also avic_vcpu_load().
                 */
                entry = svm->avic_physical_id_entry;
-               if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK)
+               if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK) {
                        pi_data.cpu = entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MASK;
-               else
+               } else {
                        pi_data.cpu = -1;
+                       pi_data.ga_log_intr = true;
+               }
 
                ret = irq_set_vcpu_affinity(host_irq, &pi_data);
                if (ret)
@@ -850,9 +852,9 @@ static void avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu,
                void *data = irqfd->irq_bypass_data;
 
                if (!(action & AVIC_TOGGLE_ON_OFF))
-                       WARN_ON_ONCE(amd_iommu_update_ga(cpu, data));
+                       WARN_ON_ONCE(amd_iommu_update_ga(data, cpu, true));
                else if (cpu >= 0)
-                       WARN_ON_ONCE(amd_iommu_activate_guest_mode(data, cpu));
+                       WARN_ON_ONCE(amd_iommu_activate_guest_mode(data, cpu, true));
                else
                        WARN_ON_ONCE(amd_iommu_deactivate_guest_mode(data));
        }

diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c
index 4b0cc249771f5baf8f92a5dfc6f12c507c2ca10b..c50d4a8a51be8bf7e281ae4b49d81a3aad696ad0 100644 (file)
--- a/drivers/iommu/amd/iommu.c
+++ b/drivers/iommu/amd/iommu.c
@@ -3804,7 +3804,8 @@ static const struct irq_domain_ops amd_ir_domain_ops = {
        .deactivate = irq_remapping_deactivate,
 };
 
-static void __amd_iommu_update_ga(struct irte_ga *entry, int cpu)
+static void __amd_iommu_update_ga(struct irte_ga *entry, int cpu,
+                                 bool ga_log_intr)
 {
        if (cpu >= 0) {
                entry->lo.fields_vapic.destination =
@@ -3812,8 +3813,10 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int cpu)
                entry->hi.fields.destination =
                                        APICID_TO_IRTE_DEST_HI(cpu);
                entry->lo.fields_vapic.is_run = true;
+               entry->lo.fields_vapic.ga_log_intr = false;
        } else {
                entry->lo.fields_vapic.is_run = false;
+               entry->lo.fields_vapic.ga_log_intr = ga_log_intr;
        }
 }
 
@@ -3822,16 +3825,19 @@ static void __amd_iommu_update_ga(struct irte_ga *entry, int cpu)
  * a vCPU, without issuing an IOMMU invalidation for the IRTE.
  *
  * If the vCPU is associated with a pCPU (@cpu >= 0), configure the Destination
- * with the pCPU's APIC ID and set IsRun, else clear IsRun.  I.e. treat vCPUs
- * that are associated with a pCPU as running.  This API is intended to be used
- * when a vCPU is scheduled in/out (or stops running for any reason), to do a
- * fast update of IsRun and (conditionally) Destination.
+ * with the pCPU's APIC ID, set IsRun, and clear GALogIntr.  If the vCPU isn't
+ * associated with a pCPU (@cpu < 0), clear IsRun and set/clear GALogIntr based
+ * on input from the caller (e.g. KVM only requests GALogIntr when the vCPU is
+ * blocking and requires a notification wake event).  I.e. treat vCPUs that are
+ * associated with a pCPU as running.  This API is intended to be used when a
+ * vCPU is scheduled in/out (or stops running for any reason), to do a fast
+ * update of IsRun, GALogIntr, and (conditionally) Destination.
  *
  * Per the IOMMU spec, the Destination, IsRun, and GATag fields are not cached
  * and thus don't require an invalidation to ensure the IOMMU consumes fresh
  * information.
  */
-int amd_iommu_update_ga(int cpu, void *data)
+int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr)
 {
        struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
        struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
@@ -3845,14 +3851,14 @@ int amd_iommu_update_ga(int cpu, void *data)
        if (!ir_data->iommu)
                return -ENODEV;
 
-       __amd_iommu_update_ga(entry, cpu);
+       __amd_iommu_update_ga(entry, cpu, ga_log_intr);
 
        return __modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
                                ir_data->irq_2_irte.index, entry);
 }
 EXPORT_SYMBOL(amd_iommu_update_ga);
 
-int amd_iommu_activate_guest_mode(void *data, int cpu)
+int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr)
 {
        struct amd_ir_data *ir_data = (struct amd_ir_data *)data;
        struct irte_ga *entry = (struct irte_ga *) ir_data->entry;
@@ -3871,12 +3877,11 @@ int amd_iommu_activate_guest_mode(void *data, int cpu)
 
        entry->lo.fields_vapic.valid       = valid;
        entry->lo.fields_vapic.guest_mode  = 1;
-       entry->lo.fields_vapic.ga_log_intr = 1;
        entry->hi.fields.ga_root_ptr       = ir_data->ga_root_ptr;
        entry->hi.fields.vector            = ir_data->ga_vector;
        entry->lo.fields_vapic.ga_tag      = ir_data->ga_tag;
 
-       __amd_iommu_update_ga(entry, cpu);
+       __amd_iommu_update_ga(entry, cpu, ga_log_intr);
 
        return modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid,
                              ir_data->irq_2_irte.index, entry);
@@ -3947,7 +3952,8 @@ static int amd_ir_set_vcpu_affinity(struct irq_data *data, void *info)
                ir_data->ga_vector = pi_data->vector;
                ir_data->ga_tag = pi_data->ga_tag;
                if (pi_data->is_guest_mode)
-                       ret = amd_iommu_activate_guest_mode(ir_data, pi_data->cpu);
+                       ret = amd_iommu_activate_guest_mode(ir_data, pi_data->cpu,
+                                                           pi_data->ga_log_intr);
                else
                        ret = amd_iommu_deactivate_guest_mode(ir_data);
        } else {

diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h
index c9f2df0c4596cb67633f1062e7e46e678c23e945..8cced632ecd031682401456eb9e0bef52a8dc2ec 100644 (file)
--- a/include/linux/amd-iommu.h
+++ b/include/linux/amd-iommu.h
@@ -30,9 +30,8 @@ static inline void amd_iommu_detect(void) { }
 /* IOMMU AVIC Function */
 extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32));
 
-extern int amd_iommu_update_ga(int cpu, void *data);
-
-extern int amd_iommu_activate_guest_mode(void *data, int cpu);
+extern int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr);
+extern int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr);
 extern int amd_iommu_deactivate_guest_mode(void *data);
 
 #else /* defined(CONFIG_AMD_IOMMU) && defined(CONFIG_IRQ_REMAP) */
@@ -43,12 +42,12 @@ amd_iommu_register_ga_log_notifier(int (*notifier)(u32))
        return 0;
 }
 
-static inline int amd_iommu_update_ga(int cpu, void *data)
+static inline int amd_iommu_update_ga(void *data, int cpu, bool ga_log_intr)
 {
        return 0;
 }
 
-static inline int amd_iommu_activate_guest_mode(void *data, int cpu)
+static inline int amd_iommu_activate_guest_mode(void *data, int cpu, bool ga_log_intr)
 {
        return 0;
 }