]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: mediatek: mt7988: move uart0 and spi1 pins to soc dtsi
authorFrank Wunderlich <frank-w@public-files.de>
Fri, 16 May 2025 18:01:36 +0000 (20:01 +0200)
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Tue, 20 May 2025 10:29:33 +0000 (12:29 +0200)
In order to use uart0 or spi1 there is only 1 possible pin definition
so move them to soc dtsi to reuse them in other boards and avoiding
conflict if defined twice.

Suggested-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20250516180147.10416-7-linux@fw-web.de
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi
arch/arm64/boot/dts/mediatek/mt7988a.dtsi

index 37e541a98ee17b79a83f17512fef9bc43e2430ae..23b267cd47ac94f3e565951380a5eb17f94a245c 100644 (file)
                };
        };
 
-       uart0_pins: uart0-pins {
-               mux {
-                       function = "uart";
-                       groups =  "uart0";
-               };
-       };
-
        snfi_pins: snfi-pins {
                mux {
                        function = "flash";
                };
        };
 
-       spi1_pins: spi1-pins {
-               mux {
-                       function = "spi";
-                       groups = "spi1";
-               };
-       };
-
        spi2_pins: spi2-pins {
                mux {
                        function = "spi";
index 8c31935f4ab007e035cfb5fa2dddb14e8abd1e15..ab6fc09940b8f1af7a6cb681b4f0e66454e8eab8 100644 (file)
                                                 "pcie_wake_n3_0";
                                };
                        };
+
+                       spi1_pins: spi1-pins {
+                               mux {
+                                       function = "spi";
+                                       groups = "spi1";
+                               };
+                       };
+
+                       uart0_pins: uart0-pins {
+                               mux {
+                                       function = "uart";
+                                       groups =  "uart0";
+                               };
+                       };
                };
 
                pwm: pwm@10048000 {
                        clocks = <&topckgen CLK_TOP_UART_SEL>,
                                 <&infracfg CLK_INFRA_52M_UART0_CK>;
                        clock-names = "baud", "bus";
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&uart0_pins>;
                        status = "disabled";
                };
 
                                      "hclk";
                        #address-cells = <1>;
                        #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&spi1_pins>;
                        status = "disabled";
                };