ARM: dts: aspeed: santabarbara: Add AMD APML interface support

Enable AMD APML related features
 - add amd sbrmi node for SoC power reading
 - add amd sbtsi node for SoC temperature reading
 - rename the P0_I3C_APML_ALERT_L GPIO to align with the naming
   convention expected by the AMD APML tool

Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
index 3f36c8e03f488d4c846451873c800f29e2d0a657..3ca5109af19bce378703cd55852ae7b2e7a7d3b5 100644 (file)
--- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
+++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-santabarbara.dts
@@ -329,6 +329,20 @@
        };
 };
 
+&i2c3 {
+       status = "okay";
+
+       sbrmi@3c {
+               compatible = "amd,sbrmi";
+               reg = <0x3c>;
+       };
+
+       sbtsi@4c {
+               compatible = "amd,sbtsi";
+               reg = <0x4c>;
+       };
+};
+
 &i2c4 {
        status = "okay";
 
@@ -1755,7 +1769,7 @@
        "P12V_SCM_ADC_ALERT","",
        "CPU0_REGS_I2C_ALERT_N","",
        "FM_RTC_ALERT_N","",
-       "APML_CPU0_ALERT_R_N","",
+       "P0_I3C_APML_ALERT_L","",
        /*J0-J3 line 144-151*/
        "SMB_RJ45_FIO_TMP_ALERT","",
        "FM_SMB_ALERT_MCIO_0A_N","",