drm/i915/dmc: Enable PIPEDMC_ERROR interrupt

Enable PIPEDMC_ERROR interrupt bit for display version 35+.

Changes in v2:
- Move PIPEDMC_ERROR interrupt enable to a separate patch (Ville Syrjala)
Changes in v3:
- Add Bspec reference (Suraj Kandpal)
Changes in v4:
- Add TODO to check the enablement of PIPEDMC_ERROR for PTL (Suraj Kandpal)
Changes in v5:
- Move TODO to the beginning of pipedmc_interrupt_mask() (Suraj Kandpal)

Bspec: 70296
Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260327064453.2241523-3-dibin.moolakadan.subrahmanian@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 1d2e09471ba4dcc8d48a31eec70ed134ea6c028f..2104164e136e4cb0fdf1eb384ce65dfda4d25518 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -505,8 +505,13 @@ static void pipedmc_clock_gating_wa(struct intel_display *display, bool enable)
 
 static u32 pipedmc_interrupt_mask(struct intel_display *display)
 {
+       /*
+        * TODO: Check if PIPEDMC_ERROR bit enabling causes errors
+        * on PTL, enable it if validation passes
+        */
        if (DISPLAY_VER(display) >= 35)
-               return PIPEDMC_FLIPQ_PROG_DONE;
+               return PIPEDMC_FLIPQ_PROG_DONE |
+                       PIPEDMC_ERROR;
 
        /*
         * FIXME PIPEDMC_ERROR not enabled for now due to LNL pipe B