+MODULE_LICENSE("GPL");
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
-@@ -103,6 +103,8 @@ static const struct of_device_id allowli
+@@ -104,6 +104,8 @@ static const struct of_device_id allowli
* platforms using "operating-points-v2" property.
*/
static const struct of_device_id blocklist[] __initconst = {
};
--- a/drivers/cpufreq/cpufreq-dt-platdev.c
+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
-@@ -103,6 +103,7 @@ static const struct of_device_id allowli
+@@ -104,6 +104,7 @@ static const struct of_device_id allowli
* platforms using "operating-points-v2" property.
*/
static const struct of_device_id blocklist[] __initconst = {
menu "SPI GPIO expanders"
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -136,6 +136,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061.
+@@ -137,6 +137,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061.
obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
depends on ARCH_RENESAS || COMPILE_TEST
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -84,6 +84,7 @@ obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4x
+@@ -85,6 +85,7 @@ obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4x
obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o
obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o
obj-$(CONFIG_GPIO_LJCA) += gpio-ljca.o
obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o
obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o
-@@ -137,6 +138,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio
+@@ -138,6 +139,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o
#
# Rule to compile a set of .o files into one .a file (with symbol table)
#
-@@ -432,26 +450,15 @@ intermediate_targets = $(foreach sfx, $(
+@@ -432,22 +450,15 @@ intermediate_targets = $(foreach sfx, $(
$(patsubst %$(strip $(1)),%$(sfx), \
$(filter %$(strip $(1)), $(targets))))
# %.asn1.o <- %.asn1.[ch] <- %.asn1
-ifneq ($(userprogs),)
-include $(srctree)/scripts/Makefile.userprogs
-endif
--
--ifneq ($(need-dtbslist)$(dtb-y)$(dtb-)$(filter %.dtb %.dtb.o %.dtbo.o,$(targets)),)
--include $(srctree)/scripts/Makefile.dtbs
--endif
+# %.dtb.o <- %.dtb.S <- %.dtb <- %.dts
+# %.dtbo.o <- %.dtbo.S <- %.dtbo <- %.dtso
+# %.lex.o <- %.lex.c <- %.l
+ $(call intermediate_targets, .lex.o, .lex.c) \
+ $(call intermediate_targets, .tab.o, .tab.c .tab.h)
+ # Single targets
+ # ---------------------------------------------------------------------------
+@@ -478,11 +489,6 @@ FORCE:
+ targets += $(filter-out $(single-subdir-goals), $(MAKECMDGOALS))
+ targets := $(filter-out $(PHONY), $(targets))
+
+-# Now that targets is fully known, include dtb rules if needed
+-ifneq ($(need-dtbslist)$(dtb-y)$(dtb-)$(filter %.dtb %.dtb.o %.dtbo.o,$(targets)),)
+-include $(srctree)/scripts/Makefile.dtbs
+-endif
+-
# Build
+ # Needs to be after the include of Makefile.dtbs, which updates always-y
# ---------------------------------------------------------------------------
--- a/scripts/Makefile.dtbinst
+++ b/scripts/Makefile.dtbinst
default y if (ARCH_BRCMSTB || BMIPS_GENERIC)
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -39,6 +39,7 @@ obj-$(CONFIG_GPIO_ASPEED_SGPIO) += gpio
+@@ -40,6 +40,7 @@ obj-$(CONFIG_GPIO_ASPEED_SGPIO) += gpio
obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
obj-$(CONFIG_GPIO_BCM_XGS_IPROC) += gpio-xgs-iproc.o
depends on MFD_JANZ_CMODIO
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -65,6 +65,7 @@ obj-$(CONFIG_GPIO_EN7523) += gpio-en752
+@@ -66,6 +66,7 @@ obj-$(CONFIG_GPIO_EN7523) += gpio-en752
obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
obj-$(CONFIG_GPIO_EXAR) += gpio-exar.o
obj-$(CONFIG_GPIO_F7188X) += gpio-f7188x.o
depends on ARCH_PXA || ARCH_MMP || COMPILE_TEST
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -136,6 +136,7 @@ obj-$(CONFIG_GPIO_PCI_IDIO_16) += gpio-
+@@ -137,6 +137,7 @@ obj-$(CONFIG_GPIO_PCI_IDIO_16) += gpio-
obj-$(CONFIG_GPIO_PISOSR) += gpio-pisosr.o
obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o
obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o
static void macb_init_buffers(struct macb *bp)
{
struct macb_queue *queue;
-@@ -977,6 +993,7 @@ static int macb_mii_init(struct macb *bp
+@@ -976,6 +992,7 @@ static int macb_mii_init(struct macb *bp
bp->mii_bus->write = &macb_mdio_write_c22;
bp->mii_bus->read_c45 = &macb_mdio_read_c45;
bp->mii_bus->write_c45 = &macb_mdio_write_c45;
snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
bp->pdev->name, bp->pdev->id);
bp->mii_bus->priv = bp;
-@@ -1642,6 +1659,11 @@ static int macb_rx(struct macb_queue *qu
+@@ -1641,6 +1658,11 @@ static int macb_rx(struct macb_queue *qu
macb_init_rx_ring(queue);
queue_writel(queue, RBQP, queue->rx_ring_dma);
macb_writel(bp, NCR, ctrl | MACB_BIT(RE));
-@@ -1944,8 +1966,9 @@ static irqreturn_t macb_interrupt(int ir
+@@ -1943,8 +1965,9 @@ static irqreturn_t macb_interrupt(int ir
queue_writel(queue, ISR, MACB_BIT(TCOMP) |
MACB_BIT(TXUBR));
wmb(); // ensure softirq can see update
}
-@@ -2401,6 +2424,11 @@ static netdev_tx_t macb_start_xmit(struc
+@@ -2400,6 +2423,11 @@ static netdev_tx_t macb_start_xmit(struc
skb_tx_timestamp(skb);
spin_lock(&bp->lock);
macb_writel(bp, NCR, macb_readl(bp, NCR) | MACB_BIT(TSTART));
spin_unlock(&bp->lock);
-@@ -2807,6 +2835,37 @@ static void macb_configure_dma(struct ma
+@@ -2806,6 +2834,37 @@ static void macb_configure_dma(struct ma
}
}
static void macb_init_hw(struct macb *bp)
{
u32 config;
-@@ -2835,6 +2894,11 @@ static void macb_init_hw(struct macb *bp
+@@ -2834,6 +2893,11 @@ static void macb_init_hw(struct macb *bp
if (bp->caps & MACB_CAPS_JUMBO)
bp->rx_frm_len_mask = MACB_RX_JFRMLEN_MASK;
macb_configure_dma(bp);
/* Enable RX partial store and forward and set watermark */
-@@ -3199,6 +3263,52 @@ static void gem_get_ethtool_strings(stru
+@@ -3200,6 +3264,52 @@ static void gem_get_ethtool_strings(stru
}
}
static struct net_device_stats *macb_get_stats(struct net_device *dev)
{
struct macb *bp = netdev_priv(dev);
-@@ -3783,6 +3893,8 @@ static const struct ethtool_ops macb_eth
+@@ -3784,6 +3894,8 @@ static const struct ethtool_ops macb_eth
};
static const struct ethtool_ops gem_ethtool_ops = {
.get_regs_len = macb_get_regs_len,
.get_regs = macb_get_regs,
.get_wol = macb_get_wol,
-@@ -3792,6 +3904,8 @@ static const struct ethtool_ops gem_etht
+@@ -3793,6 +3905,8 @@ static const struct ethtool_ops gem_etht
.get_ethtool_stats = gem_get_ethtool_stats,
.get_strings = gem_get_ethtool_strings,
.get_sset_count = gem_get_sset_count,
.get_link_ksettings = macb_get_link_ksettings,
.set_link_ksettings = macb_set_link_ksettings,
.get_ringparam = macb_get_ringparam,
-@@ -5113,6 +5227,11 @@ static int macb_probe(struct platform_de
+@@ -5114,6 +5228,11 @@ static int macb_probe(struct platform_de
}
}
}
spin_lock_init(&bp->lock);
spin_lock_init(&bp->stats_lock);
-@@ -5173,6 +5292,21 @@ static int macb_probe(struct platform_de
+@@ -5174,6 +5293,21 @@ static int macb_probe(struct platform_de
else
bp->phy_interface = interface;
/* IP specific init */
err = init(pdev);
if (err)
-@@ -5244,6 +5378,19 @@ static void macb_remove(struct platform_
+@@ -5245,6 +5379,19 @@ static void macb_remove(struct platform_
}
}
static int __maybe_unused macb_suspend(struct device *dev)
{
struct net_device *netdev = dev_get_drvdata(dev);
-@@ -5497,6 +5644,7 @@ static const struct dev_pm_ops macb_pm_o
+@@ -5498,6 +5645,7 @@ static const struct dev_pm_ops macb_pm_o
static struct platform_driver macb_driver = {
.probe = macb_probe,
.remove_new = macb_remove,
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
-@@ -123,7 +123,9 @@
+@@ -124,7 +124,9 @@
#define DW_IC_ERR_TX_ABRT 0x1
#define DW_IC_COMP_PARAM_1_SPEED_MODE_MASK GENMASK(3, 2)
--- a/drivers/i2c/busses/i2c-designware-master.c
+++ b/drivers/i2c/busses/i2c-designware-master.c
-@@ -248,6 +248,10 @@ static void i2c_dw_xfer_init(struct dw_i
+@@ -255,6 +255,10 @@ static void i2c_dw_xfer_init(struct dw_i
ic_tar = DW_IC_TAR_10BITADDR_MASTER;
}
regmap_update_bits(dev->map, DW_IC_CON, DW_IC_CON_10BITADDR_MASTER,
ic_con);
-@@ -457,6 +461,14 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
+@@ -464,6 +468,14 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev)
regmap_read(dev->map, DW_IC_RXFLR, &flr);
rx_limit = dev->rx_fifo_depth - flr;
while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) {
u32 cmd = 0;
-@@ -895,14 +907,15 @@ static const struct i2c_algorithm i2c_dw
+@@ -902,14 +914,15 @@ static const struct i2c_algorithm i2c_dw
};
static const struct i2c_adapter_quirks i2c_dw_quirks = {
int i2c_dw_fw_parse_and_configure(struct dw_i2c_dev *dev)
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
-@@ -293,6 +293,7 @@ struct dw_i2c_dev {
+@@ -294,6 +294,7 @@ struct dw_i2c_dev {
u16 fp_lcnt;
u16 hs_hcnt;
u16 hs_lcnt;
}
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
-@@ -78,9 +78,12 @@
+@@ -78,10 +78,13 @@
#define DW_IC_TX_ABRT_SOURCE 0x80
#define DW_IC_ENABLE_STATUS 0x9c
#define DW_IC_CLR_RESTART_DET 0xa8
+#define DW_IC_SCL_STUCK_AT_LOW_TIMEOUT 0xac
+#define DW_IC_SDA_STUCK_AT_LOW_TIMEOUT 0xb0
+ #define DW_IC_SMBUS_INTR_MASK 0xcc
#define DW_IC_COMP_PARAM_1 0xf4
#define DW_IC_COMP_VERSION 0xf8
#define DW_IC_SDA_HOLD_MIN_VERS 0x3131312A /* "111*" == v1.11* */
#define DW_IC_COMP_TYPE 0xfc
#define DW_IC_COMP_TYPE_VALUE 0x44570140 /* "DW" + 0x0140 */
-@@ -110,6 +113,7 @@
+@@ -111,6 +114,7 @@
#define DW_IC_ENABLE_ENABLE BIT(0)
#define DW_IC_ENABLE_ABORT BIT(1)
#define DW_IC_STATUS_ACTIVITY BIT(0)
#define DW_IC_STATUS_TFE BIT(2)
-@@ -117,6 +121,7 @@
+@@ -118,6 +122,7 @@
#define DW_IC_STATUS_MASTER_ACTIVITY BIT(5)
#define DW_IC_STATUS_SLAVE_ACTIVITY BIT(6)
#define DW_IC_STATUS_MASTER_HOLD_TX_FIFO_EMPTY BIT(7)
#define DW_IC_SDA_HOLD_RX_SHIFT 16
#define DW_IC_SDA_HOLD_RX_MASK GENMASK(23, 16)
-@@ -164,6 +169,7 @@
+@@ -165,6 +170,7 @@
#define ABRT_SLAVE_FLUSH_TXFIFO 13
#define ABRT_SLAVE_ARBLOST 14
#define ABRT_SLAVE_RD_INTX 15
#define DW_IC_TX_ABRT_7B_ADDR_NOACK BIT(ABRT_7B_ADDR_NOACK)
#define DW_IC_TX_ABRT_10ADDR1_NOACK BIT(ABRT_10ADDR1_NOACK)
-@@ -179,6 +185,7 @@
+@@ -180,6 +186,7 @@
#define DW_IC_RX_ABRT_SLAVE_RD_INTX BIT(ABRT_SLAVE_RD_INTX)
#define DW_IC_RX_ABRT_SLAVE_ARBLOST BIT(ABRT_SLAVE_ARBLOST)
#define DW_IC_RX_ABRT_SLAVE_FLUSH_TXFIFO BIT(ABRT_SLAVE_FLUSH_TXFIFO)
int ret;
ret = i2c_dw_acquire_lock(dev);
-@@ -254,6 +255,17 @@ static int i2c_dw_init_master(struct dw_
+@@ -261,6 +262,17 @@ static int i2c_dw_init_master(struct dw_
regmap_write(dev->map, DW_IC_HS_SCL_LCNT, dev->hs_lcnt);
}
/* Write SDA hold time if supported */
if (dev->sda_hold_time)
regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time);
-@@ -1034,6 +1046,7 @@ int i2c_dw_probe_master(struct dw_i2c_de
+@@ -1041,6 +1053,7 @@ int i2c_dw_probe_master(struct dw_i2c_de
struct i2c_adapter *adap = &dev->adapter;
unsigned long irq_flags;
unsigned int ic_con;
int ret;
init_completion(&dev->cmd_complete);
-@@ -1068,7 +1081,11 @@ int i2c_dw_probe_master(struct dw_i2c_de
+@@ -1075,7 +1088,11 @@ int i2c_dw_probe_master(struct dw_i2c_de
if (ret)
return ret;
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
-@@ -5076,6 +5076,17 @@ static const struct macb_config versal_c
+@@ -5077,6 +5077,17 @@ static const struct macb_config versal_c
.usrio = &macb_default_usrio,
};
static const struct of_device_id macb_dt_ids[] = {
{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
{ .compatible = "cdns,macb" },
-@@ -5096,6 +5107,7 @@ static const struct of_device_id macb_dt
+@@ -5097,6 +5108,7 @@ static const struct of_device_id macb_dt
{ .compatible = "microchip,mpfs-macb", .data = &mpfs_config },
{ .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config },
{ .compatible = "microchip,sama7g5-emac", .data = &sama7g5_emac_config },
+++ /dev/null
-From 9d331103243a5314703a58b17fd21a5c104df1cc Mon Sep 17 00:00:00 2001
-From: Stanimir Varbanov <svarbanov@suse.de>
-Date: Mon, 20 Jan 2025 15:01:12 +0200
-Subject: [PATCH] PCI: brcmstb: Reuse config structure
-
-Instead of copying fields from pcie_cfg_data structure to
-brcm_pcie reference it directly.
-
-Signed-off-by: Stanimir Varbanov <svarbanov@suse.de>
-Reviewed-by: Florian Fainelil <florian.fainelli@broadcom.com>
----
- drivers/pci/controller/pcie-brcmstb.c | 70 ++++++++++++---------------
- 1 file changed, 31 insertions(+), 39 deletions(-)
-
---- a/drivers/pci/controller/pcie-brcmstb.c
-+++ b/drivers/pci/controller/pcie-brcmstb.c
-@@ -191,11 +191,11 @@
- #define SSC_STATUS_PLL_LOCK_MASK 0x800
- #define PCIE_BRCM_MAX_MEMC 3
-
--#define IDX_ADDR(pcie) ((pcie)->reg_offsets[EXT_CFG_INDEX])
--#define DATA_ADDR(pcie) ((pcie)->reg_offsets[EXT_CFG_DATA])
--#define PCIE_RGR1_SW_INIT_1(pcie) ((pcie)->reg_offsets[RGR1_SW_INIT_1])
--#define HARD_DEBUG(pcie) ((pcie)->reg_offsets[PCIE_HARD_DEBUG])
--#define INTR2_CPU_BASE(pcie) ((pcie)->reg_offsets[PCIE_INTR2_CPU_BASE])
-+#define IDX_ADDR(pcie) ((pcie)->cfg->offsets[EXT_CFG_INDEX])
-+#define DATA_ADDR(pcie) ((pcie)->cfg->offsets[EXT_CFG_DATA])
-+#define PCIE_RGR1_SW_INIT_1(pcie) ((pcie)->cfg->offsets[RGR1_SW_INIT_1])
-+#define HARD_DEBUG(pcie) ((pcie)->cfg->offsets[PCIE_HARD_DEBUG])
-+#define INTR2_CPU_BASE(pcie) ((pcie)->cfg->offsets[PCIE_INTR2_CPU_BASE])
-
- /* Rescal registers */
- #define PCIE_DVT_PMU_PCIE_PHY_CTRL 0xc700
-@@ -276,8 +276,6 @@ struct brcm_pcie {
- int gen;
- u64 msi_target_addr;
- struct brcm_msi *msi;
-- const int *reg_offsets;
-- enum pcie_soc_base soc_base;
- struct reset_control *rescal;
- struct reset_control *perst_reset;
- struct reset_control *bridge_reset;
-@@ -285,17 +283,14 @@ struct brcm_pcie {
- int num_memc;
- u64 memc_size[PCIE_BRCM_MAX_MEMC];
- u32 hw_rev;
-- int (*perst_set)(struct brcm_pcie *pcie, u32 val);
-- int (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
- struct subdev_regulators *sr;
- bool ep_wakeup_capable;
-- bool has_phy;
-- u8 num_inbound_wins;
-+ const struct pcie_cfg_data *cfg;
- };
-
- static inline bool is_bmips(const struct brcm_pcie *pcie)
- {
-- return pcie->soc_base == BCM7435 || pcie->soc_base == BCM7425;
-+ return pcie->cfg->soc_base == BCM7435 || pcie->cfg->soc_base == BCM7425;
- }
-
- /*
-@@ -855,7 +850,7 @@ static int brcm_pcie_get_inbound_wins(st
- * security considerations, and is not implemented in our modern
- * SoCs.
- */
-- if (pcie->soc_base != BCM7712)
-+ if (pcie->cfg->soc_base != BCM7712)
- add_inbound_win(b++, &n, 0, 0, 0);
-
- resource_list_for_each_entry(entry, &bridge->dma_ranges) {
-@@ -872,10 +867,10 @@ static int brcm_pcie_get_inbound_wins(st
- * That being said, each BARs size must still be a power of
- * two.
- */
-- if (pcie->soc_base == BCM7712)
-+ if (pcie->cfg->soc_base == BCM7712)
- add_inbound_win(b++, &n, size, cpu_start, pcie_start);
-
-- if (n > pcie->num_inbound_wins)
-+ if (n > pcie->cfg->num_inbound_wins)
- break;
- }
-
-@@ -889,7 +884,7 @@ static int brcm_pcie_get_inbound_wins(st
- * that enables multiple memory controllers. As such, it can return
- * now w/o doing special configuration.
- */
-- if (pcie->soc_base == BCM7712)
-+ if (pcie->cfg->soc_base == BCM7712)
- return n;
-
- ret = of_property_read_variable_u64_array(pcie->np, "brcm,scb-sizes", pcie->memc_size, 1,
-@@ -1012,7 +1007,7 @@ static void set_inbound_win_registers(st
- * 7712:
- * All of their BARs need to be set.
- */
-- if (pcie->soc_base == BCM7712) {
-+ if (pcie->cfg->soc_base == BCM7712) {
- /* BUS remap register settings */
- reg_offset = brcm_ubus_reg_offset(i);
- tmp = lower_32_bits(cpu_addr) & ~0xfff;
-@@ -1036,15 +1031,15 @@ static int brcm_pcie_setup(struct brcm_p
- int memc, ret;
-
- /* Reset the bridge */
-- ret = pcie->bridge_sw_init_set(pcie, 1);
-+ ret = pcie->cfg->bridge_sw_init_set(pcie, 1);
- if (ret)
- return ret;
-
- /* Ensure that PERST# is asserted; some bootloaders may deassert it. */
-- if (pcie->soc_base == BCM2711) {
-- ret = pcie->perst_set(pcie, 1);
-+ if (pcie->cfg->soc_base == BCM2711) {
-+ ret = pcie->cfg->perst_set(pcie, 1);
- if (ret) {
-- pcie->bridge_sw_init_set(pcie, 0);
-+ pcie->cfg->bridge_sw_init_set(pcie, 0);
- return ret;
- }
- }
-@@ -1052,7 +1047,7 @@ static int brcm_pcie_setup(struct brcm_p
- usleep_range(100, 200);
-
- /* Take the bridge out of reset */
-- ret = pcie->bridge_sw_init_set(pcie, 0);
-+ ret = pcie->cfg->bridge_sw_init_set(pcie, 0);
- if (ret)
- return ret;
-
-@@ -1072,9 +1067,9 @@ static int brcm_pcie_setup(struct brcm_p
- */
- if (is_bmips(pcie))
- burst = 0x1; /* 256 bytes */
-- else if (pcie->soc_base == BCM2711)
-+ else if (pcie->cfg->soc_base == BCM2711)
- burst = 0x0; /* 128 bytes */
-- else if (pcie->soc_base == BCM7278)
-+ else if (pcie->cfg->soc_base == BCM7278)
- burst = 0x3; /* 512 bytes */
- else
- burst = 0x2; /* 512 bytes */
-@@ -1199,7 +1194,7 @@ static void brcm_extend_rbus_timeout(str
- u32 timeout_us = 4000000; /* 4 seconds, our setting for L1SS */
-
- /* 7712 does not have this (RGR1) timer */
-- if (pcie->soc_base == BCM7712)
-+ if (pcie->cfg->soc_base == BCM7712)
- return;
-
- /* Each unit in timeout register is 1/216,000,000 seconds */
-@@ -1281,7 +1276,7 @@ static int brcm_pcie_start_link(struct b
- brcm_pcie_set_gen(pcie, pcie->gen);
-
- /* Unassert the fundamental reset */
-- ret = pcie->perst_set(pcie, 0);
-+ ret = pcie->cfg->perst_set(pcie, 0);
- if (ret)
- return ret;
-
-@@ -1465,12 +1460,12 @@ static int brcm_phy_cntl(struct brcm_pci
-
- static inline int brcm_phy_start(struct brcm_pcie *pcie)
- {
-- return pcie->has_phy ? brcm_phy_cntl(pcie, 1) : 0;
-+ return pcie->cfg->has_phy ? brcm_phy_cntl(pcie, 1) : 0;
- }
-
- static inline int brcm_phy_stop(struct brcm_pcie *pcie)
- {
-- return pcie->has_phy ? brcm_phy_cntl(pcie, 0) : 0;
-+ return pcie->cfg->has_phy ? brcm_phy_cntl(pcie, 0) : 0;
- }
-
- static int brcm_pcie_turn_off(struct brcm_pcie *pcie)
-@@ -1481,7 +1476,7 @@ static int brcm_pcie_turn_off(struct brc
- if (brcm_pcie_link_up(pcie))
- brcm_pcie_enter_l23(pcie);
- /* Assert fundamental reset */
-- ret = pcie->perst_set(pcie, 1);
-+ ret = pcie->cfg->perst_set(pcie, 1);
- if (ret)
- return ret;
-
-@@ -1584,7 +1579,7 @@ static int brcm_pcie_resume_noirq(struct
- goto err_reset;
-
- /* Take bridge out of reset so we can access the SERDES reg */
-- pcie->bridge_sw_init_set(pcie, 0);
-+ pcie->cfg->bridge_sw_init_set(pcie, 0);
-
- /* SERDES_IDDQ = 0 */
- tmp = readl(base + HARD_DEBUG(pcie));
-@@ -1805,12 +1800,7 @@ static int brcm_pcie_probe(struct platfo
- pcie = pci_host_bridge_priv(bridge);
- pcie->dev = &pdev->dev;
- pcie->np = np;
-- pcie->reg_offsets = data->offsets;
-- pcie->soc_base = data->soc_base;
-- pcie->perst_set = data->perst_set;
-- pcie->bridge_sw_init_set = data->bridge_sw_init_set;
-- pcie->has_phy = data->has_phy;
-- pcie->num_inbound_wins = data->num_inbound_wins;
-+ pcie->cfg = data;
-
- pcie->base = devm_platform_ioremap_resource(pdev, 0);
- if (IS_ERR(pcie->base))
-@@ -1845,7 +1835,7 @@ static int brcm_pcie_probe(struct platfo
- if (ret)
- return dev_err_probe(&pdev->dev, ret, "could not enable clock\n");
-
-- pcie->bridge_sw_init_set(pcie, 0);
-+ pcie->cfg->bridge_sw_init_set(pcie, 0);
-
- if (pcie->swinit_reset) {
- ret = reset_control_assert(pcie->swinit_reset);
-@@ -1884,7 +1874,8 @@ static int brcm_pcie_probe(struct platfo
- goto fail;
-
- pcie->hw_rev = readl(pcie->base + PCIE_MISC_REVISION);
-- if (pcie->soc_base == BCM4908 && pcie->hw_rev >= BRCM_PCIE_HW_REV_3_20) {
-+ if (pcie->cfg->soc_base == BCM4908 &&
-+ pcie->hw_rev >= BRCM_PCIE_HW_REV_3_20) {
- dev_err(pcie->dev, "hardware revision with unsupported PERST# setup\n");
- ret = -ENODEV;
- goto fail;
-@@ -1904,7 +1895,8 @@ static int brcm_pcie_probe(struct platfo
- }
- }
-
-- bridge->ops = pcie->soc_base == BCM7425 ? &brcm7425_pcie_ops : &brcm_pcie_ops;
-+ bridge->ops = pcie->cfg->soc_base == BCM7425 ?
-+ &brcm7425_pcie_ops : &brcm_pcie_ops;
- bridge->sysdata = pcie;
-
- platform_set_drvdata(pdev, pcie);
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
-@@ -234,10 +234,20 @@ struct inbound_win {
+@@ -237,10 +237,20 @@ struct inbound_win {
u64 cpu_addr;
};
u8 num_inbound_wins;
int (*perst_set)(struct brcm_pcie *pcie, u32 val);
int (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
-@@ -1490,8 +1500,9 @@ static int brcm_pcie_turn_off(struct brc
+@@ -1511,8 +1521,9 @@ static int brcm_pcie_turn_off(struct brc
u32p_replace_bits(&tmp, 1, PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
writel(tmp, base + HARD_DEBUG(pcie));
- /* Shutdown PCIe bridge */
-- ret = pcie->bridge_sw_init_set(pcie, 1);
+- ret = pcie->cfg->bridge_sw_init_set(pcie, 1);
+ if (!(pcie->cfg->quirks & CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN))
+ /* Shutdown PCIe bridge */
+ ret = pcie->cfg->bridge_sw_init_set(pcie, 1);
return ret;
}
-@@ -1701,6 +1712,15 @@ static const struct pcie_cfg_data bcm271
+@@ -1722,6 +1733,15 @@ static const struct pcie_cfg_data bcm271
.num_inbound_wins = 3,
};
static const struct pcie_cfg_data bcm4908_cfg = {
.offsets = pcie_offsets,
.soc_base = BCM4908,
-@@ -1752,6 +1772,7 @@ static const struct pcie_cfg_data bcm771
+@@ -1773,6 +1793,7 @@ static const struct pcie_cfg_data bcm771
static const struct of_device_id brcm_pcie_match[] = {
{ .compatible = "brcm,bcm2711-pcie", .data = &bcm2711_cfg },
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
-@@ -55,6 +55,10 @@
- #define PCIE_RC_DL_MDIO_WR_DATA 0x1104
- #define PCIE_RC_DL_MDIO_RD_DATA 0x1108
+@@ -58,6 +58,10 @@
+ #define PCIE_RC_PL_REG_PHY_CTL_1 0x1804
+ #define PCIE_RC_PL_REG_PHY_CTL_1_REG_P2_POWERDOWN_ENA_NOSYNC_MASK 0x8
+#define PCIE_RC_PL_PHY_CTL_15 0x184c
+#define PCIE_RC_PL_PHY_CTL_15_DIS_PLL_PD_MASK 0x400000
#define PCIE_MISC_MISC_CTRL 0x4008
#define PCIE_MISC_MISC_CTRL_PCIE_RCB_64B_MODE_MASK 0x80
#define PCIE_MISC_MISC_CTRL_PCIE_RCB_MPS_MODE_MASK 0x400
-@@ -251,6 +255,7 @@ struct pcie_cfg_data {
+@@ -254,6 +258,7 @@ struct pcie_cfg_data {
u8 num_inbound_wins;
int (*perst_set)(struct brcm_pcie *pcie, u32 val);
int (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val);
};
struct subdev_regulators {
-@@ -826,6 +831,38 @@ static int brcm_pcie_perst_set_generic(s
+@@ -829,6 +834,38 @@ static int brcm_pcie_perst_set_generic(s
return 0;
}
static void add_inbound_win(struct inbound_win *b, u8 *count, u64 size,
u64 cpu_addr, u64 pci_offset)
{
-@@ -1189,6 +1226,12 @@ static int brcm_pcie_setup(struct brcm_p
+@@ -1210,6 +1247,12 @@ static int brcm_pcie_setup(struct brcm_p
PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1_ENDIAN_MODE_BAR2_MASK);
writel(tmp, base + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1);
return 0;
}
-@@ -1717,6 +1760,7 @@ static const struct pcie_cfg_data bcm271
+@@ -1738,6 +1781,7 @@ static const struct pcie_cfg_data bcm271
.soc_base = BCM7712,
.perst_set = brcm_pcie_perst_set_7278,
.bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
-@@ -150,9 +150,6 @@
+@@ -153,9 +153,6 @@
#define MSI_INT_MASK_SET 0x10
#define MSI_INT_MASK_CLR 0x14
#define PCIE_RGR1_SW_INIT_1_PERST_MASK 0x1
#define PCIE_RGR1_SW_INIT_1_PERST_SHIFT 0x0
-@@ -727,8 +724,8 @@ static void __iomem *brcm_pcie_map_bus(s
+@@ -730,8 +727,8 @@ static void __iomem *brcm_pcie_map_bus(s
/* For devices, write to the config space index register */
idx = PCIE_ECAM_OFFSET(bus->number, devfn, 0);
}
static void __iomem *brcm7425_pcie_map_bus(struct pci_bus *bus,
-@@ -1711,7 +1708,7 @@ static void brcm_pcie_remove(struct plat
+@@ -1732,7 +1729,7 @@ static void brcm_pcie_remove(struct plat
static const int pcie_offsets[] = {
[RGR1_SW_INIT_1] = 0x9210,
[EXT_CFG_INDEX] = 0x9000,
[PCIE_HARD_DEBUG] = 0x4204,
[PCIE_INTR2_CPU_BASE] = 0x4300,
};
-@@ -1719,7 +1716,7 @@ static const int pcie_offsets[] = {
+@@ -1740,7 +1737,7 @@ static const int pcie_offsets[] = {
static const int pcie_offsets_bcm7278[] = {
[RGR1_SW_INIT_1] = 0xc010,
[EXT_CFG_INDEX] = 0x9000,
[PCIE_HARD_DEBUG] = 0x4204,
[PCIE_INTR2_CPU_BASE] = 0x4300,
};
-@@ -1733,8 +1730,9 @@ static const int pcie_offsets_bcm7425[]
+@@ -1754,8 +1751,9 @@ static const int pcie_offsets_bcm7425[]
};
static const int pcie_offsets_bcm7712[] = {
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
-@@ -175,8 +175,9 @@
+@@ -178,8 +178,9 @@
#define MDIO_PORT0 0x0
#define MDIO_DATA_MASK 0x7fffffff
#define MDIO_PORT_MASK 0xf0000
#define MDIO_CMD_READ 0x1
#define MDIO_CMD_WRITE 0x0
#define MDIO_DATA_DONE_MASK 0x80000000
-@@ -327,6 +328,7 @@ static u32 brcm_pcie_mdio_form_pkt(int p
+@@ -330,6 +331,7 @@ static u32 brcm_pcie_mdio_form_pkt(int p
{
u32 pkt = 0;
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
-@@ -559,7 +559,7 @@ static int brcm_irq_domain_alloc(struct
+@@ -562,7 +562,7 @@ static int brcm_irq_domain_alloc(struct
return hwirq;
for (i = 0; i < nr_irqs; i++)
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
-@@ -209,6 +209,17 @@
+@@ -212,6 +212,17 @@
#define PCIE_DVT_PMU_PCIE_PHY_CTRL_DAST_PWRDN_MASK 0x1
#define PCIE_DVT_PMU_PCIE_PHY_CTRL_DAST_PWRDN_SHIFT 0x0
/* Forward declarations */
struct brcm_pcie;
-@@ -859,6 +870,30 @@ static int brcm_pcie_post_setup_bcm2712(
+@@ -862,6 +873,30 @@ static int brcm_pcie_post_setup_bcm2712(
tmp |= 0x12;
writel(tmp, pcie->base + PCIE_RC_PL_PHY_CTL_15);
+++ /dev/null
-From 00ebe5d1d6be8beb8119a39a440c97f59782c131 Mon Sep 17 00:00:00 2001
-From: Jonathan Bell <jonathan@raspberrypi.com>
-Date: Tue, 7 Jan 2025 12:02:55 +0000
-Subject: [PATCH] PCI: brcmstb: don't use ASPM state defines for register bits
-
-In commit b478e162f227 ("PCI/ASPM: Consolidate link state defines")
-PCIE_LINK_STATE_L1 and PCIE_LINK_STATE_L0s grew some bits for more
-granular control of ASPM.
-
-This broke the aspm-no-l0s override, instead disabling link ASPM
-completely if this DT property was specified.
-
-Specify the field bits in the driver.
-
-Fixes: caab002d5069 ("PCI: brcmstb: Disable L0s component of ASPM if requested")
-Fixes: 0693b4207fd7 ("PCI: brcmstb: Split post-link up initialization to brcm_pcie_start_link()")
-Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
----
- drivers/pci/controller/pcie-brcmstb.c | 10 +++++++---
- 1 file changed, 7 insertions(+), 3 deletions(-)
-
---- a/drivers/pci/controller/pcie-brcmstb.c
-+++ b/drivers/pci/controller/pcie-brcmstb.c
-@@ -47,6 +47,9 @@
-
- #define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY 0x04dc
- #define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK 0xc00
-+#define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_L0S 0x1
-+#define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_L1 0x2
-+#define PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_MAX_LINK_SPEED_MASK 0xf
-
- #define PCIE_RC_CFG_PRIV1_ROOT_CAP 0x4f8
- #define PCIE_RC_CFG_PRIV1_ROOT_CAP_L1SS_MODE_MASK 0xf8
-@@ -1205,10 +1208,11 @@ static int brcm_pcie_setup(struct brcm_p
- pcie->msi_target_addr = BRCM_MSI_TARGET_ADDR_GT_4GB;
-
-
-- /* Don't advertise L0s capability if 'aspm-no-l0s' */
-- aspm_support = PCIE_LINK_STATE_L1;
-+ /* Always advertise L1 capability */
-+ aspm_support = PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_L1;
-+ /* Advertise L0s capability unless 'aspm-no-l0s' is set */
- if (!of_property_read_bool(pcie->np, "aspm-no-l0s"))
-- aspm_support |= PCIE_LINK_STATE_L0S;
-+ aspm_support |= PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_L0S;
- tmp = readl(base + PCIE_RC_CFG_PRIV1_LINK_CAPABILITY);
- u32p_replace_bits(&tmp, aspm_support,
- PCIE_RC_CFG_PRIV1_LINK_CAPABILITY_ASPM_SUPPORT_MASK);
--- a/drivers/pci/controller/pcie-brcmstb.c
+++ b/drivers/pci/controller/pcie-brcmstb.c
-@@ -1358,7 +1358,7 @@ static int brcm_pcie_start_link(struct b
+@@ -1375,7 +1375,7 @@ static int brcm_pcie_start_link(struct b
{
struct device *dev = pcie->dev;
void __iomem *base = pcie->base;
bool ssc_good = false;
int ret, i;
-@@ -1407,6 +1407,17 @@ static int brcm_pcie_start_link(struct b
+@@ -1424,6 +1424,17 @@ static int brcm_pcie_start_link(struct b
pci_speed_string(pcie_link_speed[cls]), nlw,
ssc_good ? "(SSC)" : "(!SSC)");
struct pcie_cfg_data {
const int *offsets;
const enum pcie_soc_base soc_base;
-@@ -1811,7 +1817,7 @@ static const struct pcie_cfg_data bcm271
+@@ -1828,7 +1834,7 @@ static const struct pcie_cfg_data bcm271
.perst_set = brcm_pcie_perst_set_7278,
.bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,
.post_setup = brcm_pcie_post_setup_bcm2712,
.num_inbound_wins = 10,
};
-@@ -1928,7 +1934,8 @@ static int brcm_pcie_probe(struct platfo
+@@ -1945,7 +1951,8 @@ static int brcm_pcie_probe(struct platfo
ret = of_pci_get_max_link_speed(np);
pcie->gen = (ret < 0) ? 0 : ret;
};
static inline bool is_bmips(const struct brcm_pcie *pcie)
-@@ -1487,13 +1489,32 @@ static int brcm_pcie_start_link(struct b
+@@ -1504,13 +1506,32 @@ static int brcm_pcie_start_link(struct b
u16 nlw, cls, lnksta, tmp16;
bool ssc_good = false;
int ret, i;
if (ret)
return ret;
-@@ -2057,6 +2078,8 @@ static int brcm_pcie_probe(struct platfo
+@@ -2074,6 +2095,8 @@ static int brcm_pcie_probe(struct platfo
pcie->ssc = !(pcie->cfg->quirks & CFG_QUIRK_NO_SSC) &&
of_property_read_bool(np, "brcm,enable-ssc");
PCIE_MISC_HARD_PCIE_HARD_DEBUG_L1SS_ENABLE_MASK)
#define PCIE_MISC_UBUS_BAR1_CONFIG_REMAP 0x40ac
-@@ -1470,12 +1474,21 @@ static void brcm_config_clkreq(struct br
+@@ -1487,12 +1491,21 @@ static void brcm_config_clkreq(struct br
} else {
/*
+++ /dev/null
-From 0170785447ca3fcc51b8f46cfc485340c5c40f93 Mon Sep 17 00:00:00 2001
-From: Dave Stevenson <dave.stevenson@raspberrypi.com>
-Date: Tue, 15 Apr 2025 15:38:55 +0100
-Subject: [PATCH] media: i2c: imx219: Restore the 1920x1080 to using a 1:1 PAR
-
-Commit 0af46fbc333d ("media: i2c: imx219: Calculate crop rectangle
-dynamically") meant that the 1920x1080 switched from using no binning
-to using vertical binning but no horizontal binning.
-
-Restore the original behaviour by ensuring the two binning settings
-are the same.
-
-Fixes: 0af46fbc333d ("media: i2c: imx219: Calculate crop rectangle dynamically")
-Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
----
- drivers/media/i2c/imx219.c | 7 ++++---
- 1 file changed, 4 insertions(+), 3 deletions(-)
-
---- a/drivers/media/i2c/imx219.c
-+++ b/drivers/media/i2c/imx219.c
-@@ -843,7 +843,7 @@ static int imx219_set_pad_format(struct
- const struct imx219_mode *mode;
- struct v4l2_mbus_framefmt *format;
- struct v4l2_rect *crop;
-- unsigned int bin_h, bin_v;
-+ unsigned int bin_h, bin_v, binning;
-
- mode = v4l2_find_nearest_size(supported_modes,
- ARRAY_SIZE(supported_modes),
-@@ -861,10 +861,11 @@ static int imx219_set_pad_format(struct
- */
- bin_h = min(IMX219_PIXEL_ARRAY_WIDTH / format->width, 2U);
- bin_v = min(IMX219_PIXEL_ARRAY_HEIGHT / format->height, 2U);
-+ binning = min(bin_h, bin_v);
-
- crop = v4l2_subdev_state_get_crop(state, 0);
-- crop->width = format->width * bin_h;
-- crop->height = format->height * bin_v;
-+ crop->width = format->width * binning;
-+ crop->height = format->height * binning;
- crop->left = (IMX219_NATIVE_WIDTH - crop->width) / 2;
- crop->top = (IMX219_NATIVE_HEIGHT - crop->height) / 2;
-
};
static inline bool is_bmips(const struct brcm_pcie *pcie)
-@@ -1495,6 +1624,133 @@ static void brcm_config_clkreq(struct br
+@@ -1512,6 +1641,133 @@ static void brcm_config_clkreq(struct br
dev_info(pcie->dev, "clkreq-mode set to %s\n", mode);
}
static int brcm_pcie_start_link(struct brcm_pcie *pcie)
{
struct device *dev = pcie->dev;
-@@ -1508,6 +1764,8 @@ static int brcm_pcie_start_link(struct b
+@@ -1525,6 +1781,8 @@ static int brcm_pcie_start_link(struct b
if (pcie->gen)
brcm_pcie_set_gen(pcie, pcie->gen);
/* Unassert the fundamental reset */
if (pcie->tperst_clk_ms) {
/*
-@@ -1531,6 +1789,8 @@ static int brcm_pcie_start_link(struct b
+@@ -1548,6 +1806,8 @@ static int brcm_pcie_start_link(struct b
if (ret)
return ret;
/*
* Wait for 100ms after PERST# deassertion; see PCIe CEM specification
* sections 2.2, PCIe r5.0, 6.6.1.
-@@ -1567,6 +1827,9 @@ static int brcm_pcie_start_link(struct b
+@@ -1584,6 +1844,9 @@ static int brcm_pcie_start_link(struct b
pci_speed_string(pcie_link_speed[cls]), nlw,
ssc_good ? "(SSC)" : "(!SSC)");
/*
* RootCtl bits are reset by perst_n, which undoes pci_enable_crs()
* called prior to pci_add_new_bus() during probe. Re-enable here.
-@@ -1898,6 +2161,7 @@ err_disable_clk:
+@@ -1915,6 +2178,7 @@ err_disable_clk:
static void __brcm_pcie_remove(struct brcm_pcie *pcie)
{
brcm_msi_remove(pcie);
brcm_pcie_turn_off(pcie);
if (brcm_phy_stop(pcie))
-@@ -2054,6 +2318,98 @@ static struct pci_ops brcm7425_pcie_ops
+@@ -2071,6 +2335,98 @@ static struct pci_ops brcm7425_pcie_ops
.remove_bus = brcm_pcie_remove_bus,
};
static int brcm_pcie_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
-@@ -2076,6 +2432,19 @@ static int brcm_pcie_probe(struct platfo
+@@ -2093,6 +2449,19 @@ static int brcm_pcie_probe(struct platfo
pcie->dev = &pdev->dev;
pcie->np = np;
pcie->cfg = data;
#include <linux/uaccess.h>
#include <asm/io.h>
-@@ -2227,6 +2229,69 @@ static void b44_adjust_link(struct net_d
+@@ -2230,6 +2232,69 @@ static void b44_adjust_link(struct net_d
}
}
static int b44_register_phy_one(struct b44 *bp)
{
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
-@@ -2263,6 +2328,9 @@ static int b44_register_phy_one(struct b
+@@ -2266,6 +2331,9 @@ static int b44_register_phy_one(struct b
if (!mdiobus_is_registered_device(bp->mii_bus, bp->phy_addr) &&
(sprom->boardflags_lo & (B44_BOARDFLAG_ROBO | B44_BOARDFLAG_ADM))) {
dev_info(sdev->dev,
"could not find PHY at %i, use fixed one\n",
bp->phy_addr);
-@@ -2457,6 +2525,7 @@ static void b44_remove_one(struct ssb_de
+@@ -2460,6 +2528,7 @@ static void b44_remove_one(struct ssb_de
unregister_netdev(dev);
if (bp->flags & B44_FLAG_EXTERNAL_PHY)
b44_unregister_phy_one(bp);
if (bp->flags & B44_FLAG_EXTERNAL_PHY)
return 0;
-@@ -2157,6 +2182,8 @@ static int b44_get_invariants(struct b44
+@@ -2160,6 +2185,8 @@ static int b44_get_invariants(struct b44
* valid PHY address. */
bp->phy_addr &= 0x1F;
+++ /dev/null
-From 64ef5f454e167bb66cf70104f033c3d71e6ef9c0 Mon Sep 17 00:00:00 2001
-From: Christian Marangi <ansuelsmth@gmail.com>
-Date: Sun, 9 Nov 2025 12:52:44 +0100
-Subject: [PATCH] mtd: mtdpart: ignore error -ENOENT from parsers on
- subpartitions
-
-Commit 5c2f7727d437 ("mtd: mtdpart: check for subpartitions parsing
-result") introduced some kind of regression with parser on subpartitions
-where if a parser emits an error then the entire parsing process from the
-upper parser fails and partitions are deleted.
-
-Not checking for error in subpartitions was originally intended as
-special parser can emit error also in the case of the partition not
-correctly init (for example a wiped partition) or special case where the
-partition should be skipped due to some ENV variables externally
-provided (from bootloader for example)
-
-One example case is the TRX partition where, in the context of a wiped
-partition, returns a -ENOENT as the trx_magic is not found in the
-expected TRX header (as the partition is wiped)
-
-To better handle this and still keep some kind of error tracking (for
-example to catch -ENOMEM errors or -EINVAL errors), permit parser on
-subpartition to emit -ENOENT error, print a debug log and skip them
-accordingly.
-
-This results in giving better tracking of the status of the parser
-(instead of returning just 0, dropping any kind of signal that there is
-something wrong with the parser) and to some degree restore the original
-logic of the subpartitions parse.
-
-(worth to notice that some special partition might have all the special
-header present for the parser and declare 0 partition in it, this is why
-it would be wrong to simply return 0 in the case of a special partition
-that is NOT init for the scanning parser)
-
-Cc: stable@vger.kernel.org
-Fixes: 5c2f7727d437 ("mtd: mtdpart: check for subpartitions parsing result")
-Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
----
- drivers/mtd/mtdpart.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
---- a/drivers/mtd/mtdpart.c
-+++ b/drivers/mtd/mtdpart.c
-@@ -425,9 +425,12 @@ int add_mtd_partitions(struct mtd_info *
-
- mtd_add_partition_attrs(child);
-
-- /* Look for subpartitions */
-+ /* Look for subpartitions (skip if no maching parser found) */
- ret = parse_mtd_partitions(child, parts[i].types, NULL);
-- if (ret < 0) {
-+ if (ret < 0 && ret == -ENOENT) {
-+ pr_debug("Skip parsing subpartitions: %d\n", ret);
-+ continue;
-+ } else if (ret < 0) {
- pr_err("Failed to parse subpartitions: %d\n", ret);
- goto err_del_partitions;
- }
--- a/block/blk.h
+++ b/block/blk.h
-@@ -556,6 +556,7 @@ void blk_free_ext_minor(unsigned int min
+@@ -570,6 +570,7 @@ void blk_free_ext_minor(unsigned int min
#define ADDPART_FLAG_NONE 0
#define ADDPART_FLAG_RAID 1
#define ADDPART_FLAG_WHOLEDISK 2
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -2603,6 +2603,19 @@ static const struct b53_chip_data b53_sw
+@@ -2606,6 +2606,19 @@ static const struct b53_chip_data b53_sw
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM53115_DEVICE_ID,
.dev_name = "BCM53115",
.vlans = 4096,
-@@ -2983,6 +2996,7 @@ int b53_switch_detect(struct b53_device
+@@ -2986,6 +2999,7 @@ int b53_switch_detect(struct b53_device
return ret;
switch (id32) {
ret = b53_reset_switch(dev);
if (ret) {
dev_err(ds->dev, "failed to reset switch\n");
-@@ -2463,6 +2468,28 @@ static int b53_get_max_mtu(struct dsa_sw
+@@ -2466,6 +2471,28 @@ static int b53_get_max_mtu(struct dsa_sw
return B53_MAX_MTU;
}
static const struct phylink_mac_ops b53_phylink_mac_ops = {
.mac_select_pcs = b53_phylink_mac_select_pcs,
.mac_config = b53_phylink_mac_config,
-@@ -2487,6 +2514,7 @@ static const struct dsa_switch_ops b53_s
+@@ -2490,6 +2517,7 @@ static const struct dsa_switch_ops b53_s
.support_eee = b53_support_eee,
.get_mac_eee = b53_get_mac_eee,
.set_mac_eee = b53_set_mac_eee,
This driver adds support for Broadcom managed switch chips. It supports
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -2304,8 +2304,11 @@ enum dsa_tag_protocol b53_get_tag_protoc
+@@ -2307,8 +2307,11 @@ enum dsa_tag_protocol b53_get_tag_protoc
goto out;
}
/* Issue a read operation for this MAC */
ret = b53_arl_rw_op(dev, 1);
-@@ -2903,6 +2904,9 @@ static int b53_switch_init(struct b53_de
+@@ -2906,6 +2907,9 @@ static int b53_switch_init(struct b53_de
}
}
dev->num_ports = fls(dev->enabled_ports);
dev->ds->num_ports = min_t(unsigned int, dev->num_ports, DSA_MAX_PORTS);
-@@ -3004,10 +3008,24 @@ int b53_switch_detect(struct b53_device
+@@ -3007,10 +3011,24 @@ int b53_switch_detect(struct b53_device
b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, 0xf);
b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, &tmp);
}
static int b53_fdb_copy(int port, const struct b53_arl_entry *ent,
-@@ -1983,14 +2040,20 @@ int b53_fdb_dump(struct dsa_switch *ds,
+@@ -1986,14 +2043,20 @@ int b53_fdb_dump(struct dsa_switch *ds,
struct b53_device *priv = ds->priv;
struct b53_arl_entry results[2];
unsigned int count = 0;
rgmii_ctrl |= RGMII_CTRL_MII_OVERRIDE;
rgmii_ctrl |= RGMII_CTRL_ENABLE_GMII;
-@@ -2801,19 +2801,6 @@ static const struct b53_chip_data b53_sw
+@@ -2804,19 +2804,6 @@ static const struct b53_chip_data b53_sw
.jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
},
{
.chip_id = BCM53010_DEVICE_ID,
.dev_name = "BCM53010",
.vlans = 4096,
-@@ -2962,13 +2949,17 @@ static const struct b53_chip_data b53_sw
+@@ -2965,13 +2952,17 @@ static const struct b53_chip_data b53_sw
static int b53_switch_init(struct b53_device *dev)
{
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -2097,7 +2097,7 @@ int b53_fdb_dump(struct dsa_switch *ds,
+@@ -2100,7 +2100,7 @@ int b53_fdb_dump(struct dsa_switch *ds,
/* Start search operation */
reg = ARL_SRCH_STDN;
ret = b53_reset_switch(dev);
if (ret) {
-@@ -2584,7 +2590,10 @@ int b53_set_ageing_time(struct dsa_switc
+@@ -2587,7 +2593,10 @@ int b53_set_ageing_time(struct dsa_switc
else
reg = B53_AGING_TIME_CONTROL;
--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
-@@ -2087,13 +2087,16 @@ static int b53_fdb_copy(int port, const
+@@ -2090,13 +2090,16 @@ static int b53_fdb_copy(int port, const
int b53_fdb_dump(struct dsa_switch *ds, int port,
dsa_fdb_dump_cb_t *cb, void *data)
{
mutex_lock(&priv->arl_mutex);
if (is5325(priv) || is5365(priv))
-@@ -2115,7 +2118,7 @@ int b53_fdb_dump(struct dsa_switch *ds,
+@@ -2118,7 +2121,7 @@ int b53_fdb_dump(struct dsa_switch *ds,
if (ret)
break;
b53_arl_search_rd(priv, 1, &results[1]);
ret = b53_fdb_copy(port, &results[1], cb, data);
if (ret)
-@@ -2125,7 +2128,7 @@ int b53_fdb_dump(struct dsa_switch *ds,
+@@ -2128,7 +2131,7 @@ int b53_fdb_dump(struct dsa_switch *ds,
break;
}
if (!(reg & ARL_SRCH_STDN))
return -ENOENT;
-@@ -2079,23 +2098,15 @@ int b53_fdb_dump(struct dsa_switch *ds,
+@@ -2082,23 +2101,15 @@ int b53_fdb_dump(struct dsa_switch *ds,
unsigned int count = 0, results_per_hit = 1;
struct b53_device *priv = ds->priv;
struct b53_arl_entry results[2];
static int b53_fdb_copy(int port, const struct b53_arl_entry *ent,
dsa_fdb_dump_cb_t *cb, void *data)
{
-@@ -2133,13 +2116,13 @@ int b53_fdb_dump(struct dsa_switch *ds,
+@@ -2136,13 +2119,13 @@ int b53_fdb_dump(struct dsa_switch *ds,
if (ret)
break;
ret = b53_fdb_copy(port, &results[1], cb, data);
if (ret)
break;
-@@ -2672,6 +2655,24 @@ static const struct dsa_switch_ops b53_s
+@@ -2675,6 +2658,24 @@ static const struct dsa_switch_ops b53_s
.port_change_mtu = b53_change_mtu,
};
struct b53_chip_data {
u32 chip_id;
const char *dev_name;
-@@ -2685,6 +2686,7 @@ struct b53_chip_data {
+@@ -2688,6 +2689,7 @@ struct b53_chip_data {
u8 duplex_reg;
u8 jumbo_pm_reg;
u8 jumbo_size_reg;
};
#define B53_VTA_REGS \
-@@ -2704,6 +2706,7 @@ static const struct b53_chip_data b53_sw
+@@ -2707,6 +2709,7 @@ static const struct b53_chip_data b53_sw
.arl_buckets = 1024,
.imp_port = 5,
.duplex_reg = B53_DUPLEX_STAT_FE,
},
{
.chip_id = BCM5365_DEVICE_ID,
-@@ -2714,6 +2717,7 @@ static const struct b53_chip_data b53_sw
+@@ -2717,6 +2720,7 @@ static const struct b53_chip_data b53_sw
.arl_buckets = 1024,
.imp_port = 5,
.duplex_reg = B53_DUPLEX_STAT_FE,
},
{
.chip_id = BCM5389_DEVICE_ID,
-@@ -2727,6 +2731,7 @@ static const struct b53_chip_data b53_sw
+@@ -2730,6 +2734,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM5395_DEVICE_ID,
-@@ -2740,6 +2745,7 @@ static const struct b53_chip_data b53_sw
+@@ -2743,6 +2748,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM5397_DEVICE_ID,
-@@ -2753,6 +2759,7 @@ static const struct b53_chip_data b53_sw
+@@ -2756,6 +2762,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM5398_DEVICE_ID,
-@@ -2766,6 +2773,7 @@ static const struct b53_chip_data b53_sw
+@@ -2769,6 +2776,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM53101_DEVICE_ID,
-@@ -2779,6 +2787,7 @@ static const struct b53_chip_data b53_sw
+@@ -2782,6 +2790,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM53115_DEVICE_ID,
-@@ -2792,6 +2801,7 @@ static const struct b53_chip_data b53_sw
+@@ -2795,6 +2804,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM53125_DEVICE_ID,
-@@ -2805,6 +2815,7 @@ static const struct b53_chip_data b53_sw
+@@ -2808,6 +2818,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM53128_DEVICE_ID,
-@@ -2818,6 +2829,7 @@ static const struct b53_chip_data b53_sw
+@@ -2821,6 +2832,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM63XX_DEVICE_ID,
-@@ -2831,6 +2843,7 @@ static const struct b53_chip_data b53_sw
+@@ -2834,6 +2846,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_63XX,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
},
{
.chip_id = BCM53010_DEVICE_ID,
-@@ -2844,6 +2857,7 @@ static const struct b53_chip_data b53_sw
+@@ -2847,6 +2860,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM53011_DEVICE_ID,
-@@ -2857,6 +2871,7 @@ static const struct b53_chip_data b53_sw
+@@ -2860,6 +2874,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM53012_DEVICE_ID,
-@@ -2870,6 +2885,7 @@ static const struct b53_chip_data b53_sw
+@@ -2873,6 +2888,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM53018_DEVICE_ID,
-@@ -2883,6 +2899,7 @@ static const struct b53_chip_data b53_sw
+@@ -2886,6 +2902,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM53019_DEVICE_ID,
-@@ -2896,6 +2913,7 @@ static const struct b53_chip_data b53_sw
+@@ -2899,6 +2916,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM58XX_DEVICE_ID,
-@@ -2909,6 +2927,7 @@ static const struct b53_chip_data b53_sw
+@@ -2912,6 +2930,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM583XX_DEVICE_ID,
-@@ -2922,6 +2941,7 @@ static const struct b53_chip_data b53_sw
+@@ -2925,6 +2944,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
/* Starfighter 2 */
{
-@@ -2936,6 +2956,7 @@ static const struct b53_chip_data b53_sw
+@@ -2939,6 +2959,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM7445_DEVICE_ID,
-@@ -2949,6 +2970,7 @@ static const struct b53_chip_data b53_sw
+@@ -2952,6 +2973,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM7278_DEVICE_ID,
-@@ -2962,6 +2984,7 @@ static const struct b53_chip_data b53_sw
+@@ -2965,6 +2987,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM53134_DEVICE_ID,
-@@ -2976,6 +2999,7 @@ static const struct b53_chip_data b53_sw
+@@ -2979,6 +3002,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
};
-@@ -3004,6 +3028,7 @@ static int b53_switch_init(struct b53_de
+@@ -3007,6 +3031,7 @@ static int b53_switch_init(struct b53_de
dev->num_vlans = chip->vlans;
dev->num_arl_bins = chip->arl_bins;
dev->num_arl_buckets = chip->arl_buckets;
static void b53_arl_search_read_95(struct b53_device *dev, u8 idx,
struct b53_arl_entry *ent)
{
-@@ -2667,6 +2708,12 @@ static const struct b53_arl_ops b53_arl_
+@@ -2670,6 +2711,12 @@ static const struct b53_arl_ops b53_arl_
.arl_search_read = b53_arl_search_read_65,
};
static const struct b53_arl_ops b53_arl_ops_95 = {
.arl_read_entry = b53_arl_read_entry_95,
.arl_write_entry = b53_arl_write_entry_95,
-@@ -2731,7 +2778,7 @@ static const struct b53_chip_data b53_sw
+@@ -2734,7 +2781,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM5395_DEVICE_ID,
-@@ -2759,7 +2806,7 @@ static const struct b53_chip_data b53_sw
+@@ -2762,7 +2809,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
},
{
.chip_id = BCM5398_DEVICE_ID,
-@@ -2773,7 +2820,7 @@ static const struct b53_chip_data b53_sw
+@@ -2776,7 +2823,7 @@ static const struct b53_chip_data b53_sw
.duplex_reg = B53_DUPLEX_STAT_GE,
.jumbo_pm_reg = B53_JUMBO_PORT_MASK,
.jumbo_size_reg = B53_JUMBO_MAX_SIZE,
static void b53_arl_search_read_95(struct b53_device *dev, u8 idx,
struct b53_arl_entry *ent)
{
-@@ -2714,6 +2738,12 @@ static const struct b53_arl_ops b53_arl_
+@@ -2717,6 +2741,12 @@ static const struct b53_arl_ops b53_arl_
.arl_search_read = b53_arl_search_read_89,
};
static const struct b53_arl_ops b53_arl_ops_95 = {
.arl_read_entry = b53_arl_read_entry_95,
.arl_write_entry = b53_arl_write_entry_95,
-@@ -2883,14 +2913,14 @@ static const struct b53_chip_data b53_sw
+@@ -2886,14 +2916,14 @@ static const struct b53_chip_data b53_sw
.dev_name = "BCM63xx",
.vlans = 4096,
.enabled_ports = 0, /* pdata must provide them */
static void b53_arl_search_read_89(struct b53_device *dev, u8 idx,
struct b53_arl_entry *ent)
{
-@@ -2730,12 +2720,6 @@ static const struct b53_arl_ops b53_arl_
+@@ -2733,12 +2723,6 @@ static const struct b53_arl_ops b53_arl_
.arl_search_read = b53_arl_search_read_25,
};
static const struct b53_arl_ops b53_arl_ops_89 = {
.arl_read_entry = b53_arl_read_entry_89,
.arl_write_entry = b53_arl_write_entry_89,
-@@ -2798,7 +2782,7 @@ static const struct b53_chip_data b53_sw
+@@ -2801,7 +2785,7 @@ static const struct b53_chip_data b53_sw
.arl_buckets = 1024,
.imp_port = 5,
.duplex_reg = B53_DUPLEX_STAT_FE,
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -4813,11 +4813,7 @@ static void r8169_phylink_handler(struct
+@@ -4810,11 +4810,7 @@ static void r8169_phylink_handler(struct
if (netif_carrier_ok(ndev)) {
rtl_link_chg_patch(tp);
pm_request_resume(d);
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5527,11 +5527,6 @@ static int rtl_init_one(struct pci_dev *
+@@ -5524,11 +5524,6 @@ static int rtl_init_one(struct pci_dev *
dev->features |= dev->hw_features;
if (rtl_chip_supports_csum_v2(tp)) {
dev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6;
netif_set_tso_max_size(dev, RTL_GSO_MAX_SIZE_V2);
-@@ -5542,6 +5537,17 @@ static int rtl_init_one(struct pci_dev *
+@@ -5539,6 +5534,17 @@ static int rtl_init_one(struct pci_dev *
netif_set_tso_max_segs(dev, RTL_GSO_MAX_SEGS_V1);
}
};
static enum mac_version rtl8169_get_mac_version(u16 xid, bool gmii)
-@@ -3929,6 +4008,9 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3926,6 +4005,9 @@ static void rtl_hw_start_8125(struct rtl
break;
}
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -4836,10 +4836,8 @@ static void rtl_task(struct work_struct
+@@ -4833,10 +4833,8 @@ static void rtl_task(struct work_struct
container_of(work, struct rtl8169_private, wk.work);
int ret;
if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
/* if chip isn't accessible, reset bus to revive it */
-@@ -4848,7 +4846,7 @@ static void rtl_task(struct work_struct
+@@ -4845,7 +4843,7 @@ static void rtl_task(struct work_struct
if (ret < 0) {
netdev_err(tp->dev, "Can't reset secondary PCI bus, detach NIC\n");
netif_device_detach(tp->dev);
}
}
-@@ -4867,8 +4865,6 @@ reset:
+@@ -4864,8 +4862,6 @@ reset:
} else if (test_and_clear_bit(RTL_FLAG_TASK_RESET_NO_QUEUE_WAKE, tp->wk.flags)) {
rtl_reset_work(tp);
}
}
static void rtl8169_init_phy(struct rtl8169_private *tp)
-@@ -4836,9 +4833,6 @@ static void rtl_task(struct work_struct
+@@ -4833,9 +4830,6 @@ static void rtl_task(struct work_struct
container_of(work, struct rtl8169_private, wk.work);
int ret;
if (test_and_clear_bit(RTL_FLAG_TASK_TX_TIMEOUT, tp->wk.flags)) {
/* if chip isn't accessible, reset bus to revive it */
if (RTL_R32(tp, TxConfig) == ~0) {
-@@ -4922,6 +4916,7 @@ static int r8169_phy_connect(struct rtl8
+@@ -4919,6 +4913,7 @@ static int r8169_phy_connect(struct rtl8
static void rtl8169_down(struct rtl8169_private *tp)
{
/* Clear all task flags */
bitmap_zero(tp->wk.flags, RTL_FLAG_MAX);
-@@ -4950,7 +4945,7 @@ static void rtl8169_up(struct rtl8169_pr
+@@ -4947,7 +4942,7 @@ static void rtl8169_up(struct rtl8169_pr
phy_resume(tp->phydev);
rtl8169_init_phy(tp);
napi_enable(&tp->napi);
rtl_reset_work(tp);
phy_start(tp->phydev);
-@@ -4967,8 +4962,6 @@ static int rtl8169_close(struct net_devi
+@@ -4964,8 +4959,6 @@ static int rtl8169_close(struct net_devi
rtl8169_down(tp);
rtl8169_rx_clear(tp);
free_irq(tp->irq, tp);
phy_disconnect(tp->phydev);
-@@ -5202,7 +5195,7 @@ static void rtl_remove_one(struct pci_de
+@@ -5199,7 +5192,7 @@ static void rtl_remove_one(struct pci_de
if (pci_dev_run_wake(pdev))
pm_runtime_get_noresume(&pdev->dev);
if (IS_ENABLED(CONFIG_R8169_LEDS))
r8169_remove_leds(tp->leds);
-@@ -5580,6 +5573,7 @@ static int rtl_init_one(struct pci_dev *
+@@ -5577,6 +5570,7 @@ static int rtl_init_one(struct pci_dev *
tp->irq = pci_irq_vector(pdev, 0);
INIT_WORK(&tp->wk.work, rtl_task);
EEE_TXIDLE_TIMER_8125 = 0x6048,
};
-@@ -3791,8 +3793,8 @@ static void rtl_hw_start_8125_common(str
+@@ -3788,8 +3790,8 @@ static void rtl_hw_start_8125_common(str
rtl_pcie_state_l2l3_disable(tp);
RTL_W16(tp, 0x382, 0x221b);
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
-@@ -5480,8 +5457,6 @@ static int rtl_init_one(struct pci_dev *
+@@ -5477,8 +5454,6 @@ static int rtl_init_one(struct pci_dev *
tp->supports_gmii = ent->driver_data == RTL_CFG_NO_GBIT ? 0 : 1;
tp->ocp_base = OCP_STD_PHY_BASE;
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5256,6 +5256,11 @@ static int r8169_mdio_register(struct rt
+@@ -5253,6 +5253,11 @@ static int r8169_mdio_register(struct rt
phy_support_eee(tp->phydev);
phy_support_asym_pause(tp->phydev);
RTL_FLAG_TASK_TX_TIMEOUT,
RTL_FLAG_MAX
};
-@@ -4749,8 +4748,6 @@ static void rtl_task(struct work_struct
+@@ -4746,8 +4745,6 @@ static void rtl_task(struct work_struct
reset:
rtl_reset_work(tp);
netif_wake_queue(tp->dev);
* { 0x7c8, 0x300, RTL_GIGA_MAC_VER_11 },
*/
-@@ -3829,7 +3828,6 @@ static void rtl_hw_config(struct rtl8169
+@@ -3826,7 +3825,6 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_08] = rtl_hw_start_8102e_3,
[RTL_GIGA_MAC_VER_09] = rtl_hw_start_8102e_2,
[RTL_GIGA_MAC_VER_10] = NULL,
[RTL_GIGA_MAC_VER_14] = rtl_hw_start_8401,
[RTL_GIGA_MAC_VER_17] = rtl_hw_start_8168b,
[RTL_GIGA_MAC_VER_18] = rtl_hw_start_8168cp_1,
-@@ -4705,12 +4703,6 @@ static irqreturn_t rtl8169_interrupt(int
+@@ -4702,12 +4700,6 @@ static irqreturn_t rtl8169_interrupt(int
if (status & LinkChg)
phy_mac_interrupt(tp->phydev);
rtl_irq_disable(tp);
napi_schedule(&tp->napi);
out:
-@@ -5127,9 +5119,6 @@ static void rtl_set_irq_mask(struct rtl8
+@@ -5124,9 +5116,6 @@ static void rtl_set_irq_mask(struct rtl8
if (tp->mac_version <= RTL_GIGA_MAC_VER_06)
tp->irq_mask |= SYSErr | RxFIFOOver;
}
static int rtl_alloc_irq(struct rtl8169_private *tp)
-@@ -5324,7 +5313,6 @@ static int rtl_jumbo_max(struct rtl8169_
+@@ -5321,7 +5310,6 @@ static int rtl_jumbo_max(struct rtl8169_
case RTL_GIGA_MAC_VER_02 ... RTL_GIGA_MAC_VER_06:
return JUMBO_7K;
/* RTL8168b */
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
-@@ -2926,7 +2926,7 @@ static void rtl_enable_exit_l1(struct rt
+@@ -2923,7 +2923,7 @@ static void rtl_enable_exit_l1(struct rt
case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
rtl_eri_set_bits(tp, 0xd4, 0x0c00);
break;
r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
break;
default:
-@@ -2940,7 +2940,7 @@ static void rtl_disable_exit_l1(struct r
+@@ -2937,7 +2937,7 @@ static void rtl_disable_exit_l1(struct r
case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
break;
r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
break;
default:
-@@ -2966,8 +2966,8 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2963,8 +2963,8 @@ static void rtl_hw_aspm_clkreq_enable(st
rtl_mod_config5(tp, 0, ASPM_en);
switch (tp->mac_version) {
val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
RTL_W8(tp, INT_CFG0_8125, val8);
break;
-@@ -2978,7 +2978,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2975,7 +2975,7 @@ static void rtl_hw_aspm_clkreq_enable(st
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
/* reset ephy tx/rx disable timer */
r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
/* chip can trigger L1.2 */
-@@ -2990,7 +2990,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2987,7 +2987,7 @@ static void rtl_hw_aspm_clkreq_enable(st
} else {
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
break;
default:
-@@ -2998,8 +2998,8 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2995,8 +2995,8 @@ static void rtl_hw_aspm_clkreq_enable(st
}
switch (tp->mac_version) {
val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
RTL_W8(tp, INT_CFG0_8125, val8);
break;
-@@ -3719,12 +3719,12 @@ static void rtl_hw_start_8125_common(str
+@@ -3716,12 +3716,12 @@ static void rtl_hw_start_8125_common(str
/* disable new tx descriptor format */
r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
-@@ -3742,8 +3742,8 @@ static void rtl_hw_start_8125_common(str
+@@ -3739,8 +3739,8 @@ static void rtl_hw_start_8125_common(str
r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0000);
r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
else
r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
-@@ -3863,8 +3863,8 @@ static void rtl_hw_config(struct rtl8169
+@@ -3860,8 +3860,8 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
};
if (hw_configs[tp->mac_version])
-@@ -3885,8 +3885,8 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3882,8 +3882,8 @@ static void rtl_hw_start_8125(struct rtl
RTL_W32(tp, i, 0);
break;
case RTL_GIGA_MAC_VER_63:
for (i = 0xa00; i < 0xa80; i += 4)
RTL_W32(tp, i, 0);
RTL_W16(tp, INT_CFG1_8125, 0x0000);
-@@ -4118,7 +4118,7 @@ static void rtl8169_cleanup(struct rtl81
+@@ -4115,7 +4115,7 @@ static void rtl8169_cleanup(struct rtl81
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
break;
rtl_enable_rxdvgate(tp);
fsleep(2000);
break;
-@@ -4275,7 +4275,7 @@ static unsigned int rtl_quirk_packet_pad
+@@ -4272,7 +4272,7 @@ static unsigned int rtl_quirk_packet_pad
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_34:
padto = max_t(unsigned int, padto, ETH_ZLEN);
break;
default:
-@@ -5294,7 +5294,7 @@ static void rtl_hw_initialize(struct rtl
+@@ -5291,7 +5291,7 @@ static void rtl_hw_initialize(struct rtl
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
rtl_hw_init_8168g(tp);
break;
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
/* 8125B family. */
-@@ -3863,6 +3867,7 @@ static void rtl_hw_config(struct rtl8169
+@@ -3860,6 +3864,7 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
};
-@@ -3881,6 +3886,7 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3878,6 +3883,7 @@ static void rtl_hw_start_8125(struct rtl
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_61:
case RTL_GIGA_MAC_VER_64:
/* 8125D family. */
{ 0x7cf, 0x689, RTL_GIGA_MAC_VER_65 },
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64 },
-@@ -3868,6 +3896,7 @@ static void rtl_hw_config(struct rtl8169
+@@ -3865,6 +3893,7 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
[RTL_GIGA_MAC_VER_71] = rtl_hw_start_8126a,
};
-@@ -3887,6 +3916,7 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3884,6 +3913,7 @@ static void rtl_hw_start_8125(struct rtl
case RTL_GIGA_MAC_VER_61:
case RTL_GIGA_MAC_VER_64:
case RTL_GIGA_MAC_VER_65:
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5228,6 +5228,33 @@ static int r8169_mdio_write_reg(struct m
+@@ -5225,6 +5225,33 @@ static int r8169_mdio_write_reg(struct m
return 0;
}
static int r8169_mdio_register(struct rtl8169_private *tp)
{
struct pci_dev *pdev = tp->pci_dev;
-@@ -5258,6 +5285,11 @@ static int r8169_mdio_register(struct rt
+@@ -5255,6 +5282,11 @@ static int r8169_mdio_register(struct rt
new_bus->read = r8169_mdio_read_reg;
new_bus->write = r8169_mdio_write_reg;
static const struct {
const char *name;
-@@ -5387,6 +5388,9 @@ static int rtl_jumbo_max(struct rtl8169_
+@@ -5384,6 +5385,9 @@ static int rtl_jumbo_max(struct rtl8169_
/* RTL8168c */
case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_24:
return JUMBO_6K;
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5474,11 +5474,10 @@ static int rtl_init_one(struct pci_dev *
+@@ -5471,11 +5471,10 @@ static int rtl_init_one(struct pci_dev *
if (region < 0)
return dev_err_probe(&pdev->dev, -ENODEV, "no MMIO resource found\n");
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5425,7 +5425,7 @@ done:
+@@ -5422,7 +5422,7 @@ done:
/* register is set if system vendor successfully tested ASPM 1.2 */
static bool rtl_aspm_is_safe(struct rtl8169_private *tp)
{
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -2852,10 +2852,23 @@ static u32 rtl_csi_read(struct rtl8169_p
+@@ -2849,10 +2849,23 @@ static u32 rtl_csi_read(struct rtl8169_p
RTL_R32(tp, CSIDR) : ~0;
}
int rc;
u8 val;
-@@ -2872,16 +2885,12 @@ static void rtl_disable_zrxdc_timeout(st
+@@ -2869,16 +2882,12 @@ static void rtl_disable_zrxdc_timeout(st
}
}
/* According to Realtek the value at config space address 0x070f
* controls the L0s/L1 entrance latency. We try standard ECAM access
-@@ -2893,10 +2902,7 @@ static void rtl_set_aspm_entry_latency(s
+@@ -2890,10 +2899,7 @@ static void rtl_set_aspm_entry_latency(s
pci_write_config_byte(pdev, 0x070f, val) == PCIBIOS_SUCCESSFUL)
return;
}
static void rtl_release_firmware(struct rtl8169_private *tp)
-@@ -5440,9 +5372,9 @@ static bool rtl_aspm_is_safe(struct rtl8
+@@ -5437,9 +5369,9 @@ static bool rtl_aspm_is_safe(struct rtl8
static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
{
struct net_device *dev;
u32 txconfig;
u16 xid;
-@@ -5492,12 +5424,13 @@ static int rtl_init_one(struct pci_dev *
+@@ -5489,12 +5421,13 @@ static int rtl_init_one(struct pci_dev *
xid = (txconfig >> 20) & 0xfcf;
/* Identify chip attached to board */
/* Disable ASPM L1 as that cause random device stop working
* problems as well as full system hangs for some PCIe devices users.
-@@ -5602,8 +5535,6 @@ static int rtl_init_one(struct pci_dev *
+@@ -5599,8 +5532,6 @@ static int rtl_init_one(struct pci_dev *
rtl_set_irq_mask(tp);
tp->counters = dmam_alloc_coherent (&pdev->dev, sizeof(*tp->counters),
&tp->counters_phys_addr,
GFP_KERNEL);
-@@ -5628,7 +5559,7 @@ static int rtl_init_one(struct pci_dev *
+@@ -5625,7 +5556,7 @@ static int rtl_init_one(struct pci_dev *
}
netdev_info(dev, "%s, %pM, XID %03x, IRQ %d\n",
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
-@@ -2898,7 +2898,7 @@ static void rtl_enable_exit_l1(struct rt
+@@ -2895,7 +2895,7 @@ static void rtl_enable_exit_l1(struct rt
case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
rtl_eri_set_bits(tp, 0xd4, 0x0c00);
break;
r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
break;
default:
-@@ -2912,7 +2912,7 @@ static void rtl_disable_exit_l1(struct r
+@@ -2909,7 +2909,7 @@ static void rtl_disable_exit_l1(struct r
case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
break;
r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
break;
default:
-@@ -2950,7 +2950,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2947,7 +2947,7 @@ static void rtl_hw_aspm_clkreq_enable(st
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
/* reset ephy tx/rx disable timer */
r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
/* chip can trigger L1.2 */
-@@ -2962,7 +2962,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2959,7 +2959,7 @@ static void rtl_hw_aspm_clkreq_enable(st
} else {
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
break;
default:
-@@ -4094,7 +4094,7 @@ static void rtl8169_cleanup(struct rtl81
+@@ -4091,7 +4091,7 @@ static void rtl8169_cleanup(struct rtl81
RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
break;
rtl_enable_rxdvgate(tp);
fsleep(2000);
break;
-@@ -4251,7 +4251,7 @@ static unsigned int rtl_quirk_packet_pad
+@@ -4248,7 +4248,7 @@ static unsigned int rtl_quirk_packet_pad
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_34:
padto = max_t(unsigned int, padto, ETH_ZLEN);
break;
default:
-@@ -5302,7 +5302,7 @@ static void rtl_hw_initialize(struct rtl
+@@ -5299,7 +5299,7 @@ static void rtl_hw_initialize(struct rtl
case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
rtl_hw_init_8168g(tp);
break;
rtl_hw_init_8125(tp);
break;
default:
-@@ -5327,7 +5327,7 @@ static int rtl_jumbo_max(struct rtl8169_
+@@ -5324,7 +5324,7 @@ static int rtl_jumbo_max(struct rtl8169_
case RTL_GIGA_MAC_VER_18 ... RTL_GIGA_MAC_VER_24:
return JUMBO_6K;
/* RTL8125/8126 */
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c
-@@ -5040,10 +5040,8 @@ static void rtl_shutdown(struct pci_dev
+@@ -5037,10 +5037,8 @@ static void rtl_shutdown(struct pci_dev
/* Restore original MAC address */
rtl_rar_set(tp, tp->dev->perm_addr);
{ 0x7cf, 0x649, RTL_GIGA_MAC_VER_70, "RTL8126A", FIRMWARE_8126A_2 },
/* 8125BP family. */
-@@ -2939,7 +2939,6 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2936,7 +2936,6 @@ static void rtl_hw_aspm_clkreq_enable(st
rtl_mod_config5(tp, 0, ASPM_en);
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_70:
val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
RTL_W8(tp, INT_CFG0_8125, val8);
break;
-@@ -2971,7 +2970,6 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2968,7 +2967,6 @@ static void rtl_hw_aspm_clkreq_enable(st
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_70:
val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
RTL_W8(tp, INT_CFG0_8125, val8);
break;
-@@ -3691,12 +3689,10 @@ static void rtl_hw_start_8125_common(str
+@@ -3688,12 +3686,10 @@ static void rtl_hw_start_8125_common(str
/* disable new tx descriptor format */
r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
-@@ -3714,8 +3710,7 @@ static void rtl_hw_start_8125_common(str
+@@ -3711,8 +3707,7 @@ static void rtl_hw_start_8125_common(str
r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0000);
r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
else
r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
-@@ -3838,7 +3833,6 @@ static void rtl_hw_config(struct rtl8169
+@@ -3835,7 +3830,6 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
};
if (hw_configs[tp->mac_version])
-@@ -3862,7 +3856,6 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3859,7 +3853,6 @@ static void rtl_hw_start_8125(struct rtl
break;
case RTL_GIGA_MAC_VER_63:
case RTL_GIGA_MAC_VER_70:
{ 0x7cf, 0x688, RTL_GIGA_MAC_VER_64, "RTL8125D", FIRMWARE_8125D_1 },
/* 8125B family. */
-@@ -3830,7 +3830,6 @@ static void rtl_hw_config(struct rtl8169
+@@ -3827,7 +3827,6 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
};
-@@ -3849,7 +3848,6 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3846,7 +3845,6 @@ static void rtl_hw_start_8125(struct rtl
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_61:
case RTL_GIGA_MAC_VER_64:
rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 42);
rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
break;
-@@ -3826,7 +3824,6 @@ static void rtl_hw_config(struct rtl8169
+@@ -3823,7 +3821,6 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_48] = rtl_hw_start_8168h_1,
[RTL_GIGA_MAC_VER_51] = rtl_hw_start_8168ep_3,
[RTL_GIGA_MAC_VER_52] = rtl_hw_start_8117,
[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
-@@ -5285,7 +5282,7 @@ static void rtl_hw_init_8125(struct rtl8
+@@ -5282,7 +5279,7 @@ static void rtl_hw_init_8125(struct rtl8
static void rtl_hw_initialize(struct rtl8169_private *tp)
{
switch (tp->mac_version) {
static inline struct device *tp_to_dev(struct rtl8169_private *tp)
{
-@@ -2937,6 +2944,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2934,6 +2941,7 @@ static void rtl_hw_aspm_clkreq_enable(st
rtl_mod_config5(tp, 0, ASPM_en);
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_70:
val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
RTL_W8(tp, INT_CFG0_8125, val8);
break;
-@@ -2968,6 +2976,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2965,6 +2973,7 @@ static void rtl_hw_aspm_clkreq_enable(st
switch (tp->mac_version) {
case RTL_GIGA_MAC_VER_70:
val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
RTL_W8(tp, INT_CFG0_8125, val8);
break;
-@@ -3687,10 +3696,13 @@ static void rtl_hw_start_8125_common(str
+@@ -3684,10 +3693,13 @@ static void rtl_hw_start_8125_common(str
/* disable new tx descriptor format */
r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
-@@ -3708,7 +3720,8 @@ static void rtl_hw_start_8125_common(str
+@@ -3705,7 +3717,8 @@ static void rtl_hw_start_8125_common(str
r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0000);
r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
else
r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
-@@ -3786,6 +3799,12 @@ static void rtl_hw_start_8126a(struct rt
+@@ -3783,6 +3796,12 @@ static void rtl_hw_start_8126a(struct rt
rtl_hw_start_8125_common(tp);
}
static void rtl_hw_config(struct rtl8169_private *tp)
{
static const rtl_generic_fct hw_configs[] = {
-@@ -3829,6 +3848,7 @@ static void rtl_hw_config(struct rtl8169
+@@ -3826,6 +3845,7 @@ static void rtl_hw_config(struct rtl8169
[RTL_GIGA_MAC_VER_64] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_66] = rtl_hw_start_8125d,
[RTL_GIGA_MAC_VER_70] = rtl_hw_start_8126a,
};
if (hw_configs[tp->mac_version])
-@@ -3846,8 +3866,11 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3843,8 +3863,11 @@ static void rtl_hw_start_8125(struct rtl
case RTL_GIGA_MAC_VER_61:
case RTL_GIGA_MAC_VER_64:
case RTL_GIGA_MAC_VER_66:
--- a/fs/locks.c
+++ b/fs/locks.c
-@@ -2971,6 +2971,8 @@ static const struct seq_operations locks
+@@ -2979,6 +2979,8 @@ static const struct seq_operations locks
static int __init proc_locks_init(void)
{
--- a/net/core/sock.c
+++ b/net/core/sock.c
-@@ -4280,6 +4280,8 @@ static __net_initdata struct pernet_oper
+@@ -4284,6 +4284,8 @@ static __net_initdata struct pernet_oper
static int __init proto_init(void)
{
--- a/net/ipv4/fib_trie.c
+++ b/net/ipv4/fib_trie.c
-@@ -3015,11 +3015,13 @@ static const struct seq_operations fib_r
+@@ -3016,11 +3016,13 @@ static const struct seq_operations fib_r
int __net_init fib_proc_init(struct net *net)
{
fib_triestat_seq_show, NULL))
goto out2;
-@@ -3030,17 +3032,21 @@ int __net_init fib_proc_init(struct net
+@@ -3031,17 +3033,21 @@ int __net_init fib_proc_init(struct net
return 0;
out3:
-LINUX_VERSION-6.12 = .63
-LINUX_KERNEL_HASH-6.12.63 = 9502c5ffe4b894383c97abfccf74430a84732f04ee476b9c0d87635b29df7db3
+LINUX_VERSION-6.12 = .64
+LINUX_KERNEL_HASH-6.12.64 = d1ad94a33681148efe884f4028970d69e332f2b003f0e8be53a1d25de38e49a2
+#endif
/*
* Get just the first code, look it up in the token table,
- * and return the first char from this token.
+ * and return the first char from this token. If MSB of length
--- a/kernel/vmcore_info.c
+++ b/kernel/vmcore_info.c
@@ -214,8 +214,10 @@ static int __init crash_save_vmcoreinfo_
static void rt_fibinfo_free(struct rtable __rcu **rtp)
--- a/net/ipv4/fib_trie.c
+++ b/net/ipv4/fib_trie.c
-@@ -2762,6 +2762,7 @@ static const char *const rtn_type_names[
+@@ -2763,6 +2763,7 @@ static const char *const rtn_type_names[
[RTN_THROW] = "THROW",
[RTN_NAT] = "NAT",
[RTN_XRESOLVE] = "XRESOLVE",
case RTN_THROW:
case RTN_UNREACHABLE:
default:
-@@ -4598,6 +4617,17 @@ static int ip6_pkt_prohibit_out(struct n
+@@ -4610,6 +4629,17 @@ static int ip6_pkt_prohibit_out(struct n
return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
}
/*
* Allocate a dst for local (unicast / anycast) address.
*/
-@@ -5089,7 +5119,8 @@ static int rtm_to_fib6_config(struct sk_
+@@ -5101,7 +5131,8 @@ static int rtm_to_fib6_config(struct sk_
if (rtm->rtm_type == RTN_UNREACHABLE ||
rtm->rtm_type == RTN_BLACKHOLE ||
rtm->rtm_type == RTN_PROHIBIT ||
cfg->fc_flags |= RTF_REJECT;
if (rtm->rtm_type == RTN_LOCAL)
-@@ -6357,6 +6388,8 @@ static int ip6_route_dev_notify(struct n
+@@ -6372,6 +6403,8 @@ static int ip6_route_dev_notify(struct n
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.ip6_prohibit_entry->dst.dev = dev;
net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
#endif
-@@ -6368,6 +6401,7 @@ static int ip6_route_dev_notify(struct n
+@@ -6383,6 +6416,7 @@ static int ip6_route_dev_notify(struct n
in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
#endif
}
-@@ -6563,6 +6597,8 @@ static int __net_init ip6_route_net_init
+@@ -6578,6 +6612,8 @@ static int __net_init ip6_route_net_init
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.fib6_has_custom_rules = false;
net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
sizeof(*net->ipv6.ip6_prohibit_entry),
GFP_KERNEL);
-@@ -6573,11 +6609,21 @@ static int __net_init ip6_route_net_init
+@@ -6588,11 +6624,21 @@ static int __net_init ip6_route_net_init
ip6_template_metrics, true);
INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->dst.rt_uncached);
net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
ip6_template_metrics, true);
-@@ -6604,6 +6650,8 @@ out:
+@@ -6619,6 +6665,8 @@ out:
return ret;
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
out_ip6_prohibit_entry:
kfree(net->ipv6.ip6_prohibit_entry);
out_ip6_null_entry:
-@@ -6623,6 +6671,7 @@ static void __net_exit ip6_route_net_exi
+@@ -6638,6 +6686,7 @@ static void __net_exit ip6_route_net_exi
kfree(net->ipv6.ip6_null_entry);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
kfree(net->ipv6.ip6_prohibit_entry);
kfree(net->ipv6.ip6_blk_hole_entry);
#endif
dst_entries_destroy(&net->ipv6.ip6_dst_ops);
-@@ -6706,6 +6755,9 @@ void __init ip6_route_init_special_entri
+@@ -6721,6 +6770,9 @@ void __init ip6_route_init_special_entri
init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
}
--- a/net/core/sock.c
+++ b/net/core/sock.c
-@@ -2554,7 +2554,7 @@ void sk_setup_caps(struct sock *sk, stru
+@@ -2557,7 +2557,7 @@ void sk_setup_caps(struct sock *sk, stru
icsk->icsk_ack.dst_quick_ack = dst_metric(dst, RTAX_QUICKACK);
}
if (sk->sk_route_caps & NETIF_F_GSO)
endif
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -45,6 +45,7 @@ obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd
+@@ -46,6 +46,7 @@ obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd
obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
obj-$(CONFIG_GPIO_CADENCE) += gpio-cadence.o
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
-@@ -2398,7 +2398,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat
+@@ -2401,7 +2401,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat
static const struct sdhci_ops sdhci_msm_ops = {
.reset = sdhci_and_cqhci_reset,
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
-@@ -1833,49 +1833,49 @@ static unsigned int sdhci_msm_get_min_cl
+@@ -1835,51 +1835,49 @@ static unsigned int sdhci_msm_get_min_cl
return SDHCI_MSM_MIN_CLOCK;
}
-{
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
+- struct mmc_ios ios = host->mmc->ios;
-
- if (!clock) {
- host->mmc->actual_clock = msm_host->clk_rate = 0;
-
- sdhci_msm_hc_select_mode(host);
-
-- msm_set_clock_rate_for_bus_mode(host, clock);
+- msm_set_clock_rate_for_bus_mode(host, ios.clock, ios.timing);
-out:
- __sdhci_msm_set_clock(host, clock);
-}
+-
+// /*
+// * __sdhci_msm_set_clock - sdhci_msm clock control.
+// *
+
+// sdhci_msm_hc_select_mode(host);
+
-+// msm_set_clock_rate_for_bus_mode(host, clock);
++// msm_set_clock_rate_for_bus_mode(host, ios.clock, ios.timing);
+// out:
+// __sdhci_msm_set_clock(host, clock);
+// }
-
/*****************************************************************************\
* *
+ * Inline Crypto Engine (ICE) support *
--- a/arch/loongarch/net/bpf_jit.c
+++ b/arch/loongarch/net/bpf_jit.c
-@@ -1170,6 +1170,14 @@ static int validate_code(struct jit_ctx
+@@ -1188,6 +1188,14 @@ static int validate_code(struct jit_ctx
return -1;
}
if (WARN_ON_ONCE(ctx->num_exentries != ctx->prog->aux->num_exentries))
return -1;
-@@ -1278,7 +1286,7 @@ skip_init_ctx:
+@@ -1296,7 +1304,7 @@ skip_init_ctx:
build_epilogue(&ctx);
/* 3. Extra pass to validate JITed code */
/*
* First instruction initializes the tail call count (TCC).
* On tail call we skip this instruction, and the TCC is
-@@ -1184,6 +1192,101 @@ static int validate_ctx(struct jit_ctx *
+@@ -1202,6 +1210,101 @@ static int validate_ctx(struct jit_ctx *
return 0;
}
#define REG_TCC LOONGARCH_GPR_A6
#define TCC_SAVED LOONGARCH_GPR_S5
-@@ -1222,6 +1228,11 @@ static int emit_jump_or_nops(void *targe
+@@ -1240,6 +1246,11 @@ static int emit_jump_or_nops(void *targe
return emit_jump_and_link(&ctx, is_call ? LOONGARCH_GPR_T0 : LOONGARCH_GPR_ZERO, (u64)target);
}
void *bpf_arch_text_copy(void *dst, void *src, size_t len)
{
int ret;
-@@ -1287,6 +1298,372 @@ int bpf_arch_text_invalidate(void *dst,
+@@ -1305,6 +1316,372 @@ int bpf_arch_text_invalidate(void *dst,
return ret;
}
u32 stack_size;
};
-@@ -308,3 +309,8 @@ static inline int emit_tailcall_jmp(stru
+@@ -334,3 +335,8 @@ static inline int emit_tailcall_jmp(stru
return -EINVAL;
}
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -19116,6 +19116,15 @@ S: Maintained
+@@ -19122,6 +19122,15 @@ S: Maintained
F: Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml
F: drivers/regulator/vqmmc-ipq4019-regulator.c
--- a/MAINTAINERS
+++ b/MAINTAINERS
-@@ -19133,6 +19133,14 @@ S: Maintained
+@@ -19139,6 +19139,14 @@ S: Maintained
F: Documentation/devicetree/bindings/mtd/qcom,nandc.yaml
F: drivers/mtd/nand/raw/qcom_nandc.c
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
-@@ -366,6 +366,7 @@ struct phy_package_shared {
+@@ -371,6 +371,7 @@ struct phy_package_shared {
/* used as bit number in atomic bitops */
#define PHY_SHARED_F_INIT_DONE 0
#define PHY_SHARED_F_PROBE_DONE 1
/**
* struct mii_bus - Represents an MDIO bus
-@@ -2245,6 +2246,11 @@ static inline bool phy_package_probe_onc
+@@ -2272,6 +2273,11 @@ static inline bool phy_package_probe_onc
return __phy_package_set_once(phydev, PHY_SHARED_F_PROBE_DONE);
}
depends on ARCH_RENESAS || COMPILE_TEST
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -135,6 +135,7 @@ obj-$(CONFIG_GPIO_PISOSR) += gpio-pisos
+@@ -136,6 +136,7 @@ obj-$(CONFIG_GPIO_PISOSR) += gpio-pisos
obj-$(CONFIG_GPIO_PL061) += gpio-pl061.o
obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o
obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o
depends on SIOX
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
-@@ -149,6 +149,7 @@ obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) += gpio
+@@ -150,6 +150,7 @@ obj-$(CONFIG_GPIO_SAMA5D2_PIOBU) += gpio
obj-$(CONFIG_GPIO_SCH311X) += gpio-sch311x.o
obj-$(CONFIG_GPIO_SCH) += gpio-sch.o
obj-$(CONFIG_GPIO_SIFIVE) += gpio-sifive.o
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
-@@ -1459,7 +1459,7 @@ static int stmmac_init_rx_buffers(struct
+@@ -1460,7 +1460,7 @@ static int stmmac_init_rx_buffers(struct
{
struct stmmac_rx_queue *rx_q = &dma_conf->rx_queue[queue];
struct stmmac_rx_buffer *buf = &rx_q->buf_pool[i];
if (priv->dma_cap.host_dma_width <= 32)
gfp |= GFP_DMA32;
-@@ -4790,7 +4790,7 @@ static inline void stmmac_rx_refill(stru
+@@ -4791,7 +4791,7 @@ static inline void stmmac_rx_refill(stru
struct stmmac_rx_queue *rx_q = &priv->dma_conf.rx_queue[queue];
int dirty = stmmac_rx_dirty(priv, queue);
unsigned int entry = rx_q->dirty_rx;
projects / thirdparty / openwrt.git / commitdiff
