--- /dev/null
+From 145aa2977a42b97d052ed0984fb305a853f55d49 Mon Sep 17 00:00:00 2001
+From: Mantas Pucka <mantas@8devices.com>
+Date: Wed, 11 Apr 2025 15:14:19 +0300
+Subject: [PATCH] clk: qcom: nsscc-ipq9574: enable bus clock
+
+Enable bus clock, otherwise nsscc registers are unaccessible.
+
+Signed-off-by: Mantas Pucka <mantas@8devices.com>
+---
+ arch/arm64/boot/dts/qcom/ipq9574.dtsi | 3 +-
+ drivers/clk/qcom/nsscc-ipq9574.c | 5 +
+ 2 file changed, 7 insertions(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
++++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+@@ -1252,7 +1252,8 @@
+ <&pcsuniphy2 UNIPHY_NSS_TX_CLK>,
+ <&gcc GCC_NSSNOC_NSSCC_CLK>,
+ <&gcc GCC_NSSNOC_SNOC_CLK>,
+- <&gcc GCC_NSSNOC_SNOC_1_CLK>;
++ <&gcc GCC_NSSNOC_SNOC_1_CLK>,
++ <&gcc GCC_NSSCC_CLK>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+--- a/drivers/clk/qcom/nsscc-ipq9574.c
++++ b/drivers/clk/qcom/nsscc-ipq9574.c
+@@ -46,6 +46,7 @@ enum {
+ DT_GCC_NSSNOC_NSSCC_CLK,
+ DT_GCC_NSSNOC_SNOC_CLK,
+ DT_GCC_NSSNOC_SNOC_1_CLK,
++ DT_GCC_NSS_BUS_CLK,
+ };
+
+ enum {
+@@ -3075,6 +3076,10 @@ static int nss_cc_ipq9574_probe(struct p
+ if (ret)
+ return ret;
+
++ ret = of_pm_clk_add_clk_index(dev, DT_GCC_NSS_BUS_CLK);
++ if (ret)
++ return dev_err_probe(&pdev->dev, ret, "Fail to add bus clock\n");
++
+ ret = of_pm_clk_add_clk_index(dev, DT_GCC_NSSNOC_NSSCC_CLK);
+ if (ret)
+ return dev_err_probe(dev, ret,"failed to acquire nssnoc clock\n");