Make xxsplti*, xpermx, xxeval be vecperm type.

I noticed that the built-functions for xxspltiw, xxspltidp, xxsplti32dx,
xxpermx, and xxeval all used the 'vecsimple' type.  These instructions are
permute instructions (3 cycle latency) and should use 'vecperm' instead.

While I was at it, I changed the UNSPEC name for xxspltidp to be
UNSPEC_XXSPLTIDP instead of UNSPEC_XXSPLTID.

2021-08-25  Michael Meissner  <meissner@linux.ibm.com>

gcc/
	* config/rs6000/vsx.md (UNSPEC_XXSPLTIDP): Rename from
	UNSPEC_XXSPLTID.
	(xxspltiw_v4si): Use vecperm type attribute.
	(xxspltiw_v4si_inst): Use vecperm type attribute.
	(xxspltiw_v4sf_inst): Likewise.
	(xxspltidp_v2df): Use vecperm type attribute.  Use
	UNSPEC_XXSPLTIDP instead of UNSPEC_XXSPLTID.
	(xxspltidp_v2df_inst): Likewise.
	(xxsplti32dx_v4si): Use vecperm type attribute.
	(xxsplti32dx_v4si_inst): Likewise.
	(xxsplti32dx_v4sf_inst): Likewise.
	(xxblend_<mode>): Likewise.
	(xxpermx): Likewise.
	(xxpermx_inst): Likewise.
	(xxeval): Likewise.

diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index e4ca6e94d4990f87c08c236156cebf0b452daa24..bf033e31c1cbcb00382831b8f8c4c133bf7e78a8 100644 (file)
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -374,7 +374,7 @@
    UNSPEC_VDIVEU
    UNSPEC_XXEVAL
    UNSPEC_XXSPLTIW
-   UNSPEC_XXSPLTID
+   UNSPEC_XXSPLTIDP
    UNSPEC_XXSPLTI32DX
    UNSPEC_XXBLEND
    UNSPEC_XXPERMX
@@ -6414,7 +6414,7 @@
                     UNSPEC_XXSPLTIW))]
  "TARGET_POWER10"
  "xxspltiw %x0,%1"
- [(set_attr "type" "vecsimple")
+ [(set_attr "type" "vecperm")
   (set_attr "prefixed" "yes")])
 
 (define_expand "xxspltiw_v4sf"
@@ -6434,14 +6434,14 @@
                     UNSPEC_XXSPLTIW))]
  "TARGET_POWER10"
  "xxspltiw %x0,%1"
- [(set_attr "type" "vecsimple")
+ [(set_attr "type" "vecperm")
   (set_attr "prefixed" "yes")])
 
 ;; XXSPLTIDP built-in function support
 (define_expand "xxspltidp_v2df"
   [(set (match_operand:V2DF 0 "register_operand" )
        (unspec:V2DF [(match_operand:SF 1 "const_double_operand")]
-                    UNSPEC_XXSPLTID))]
+                    UNSPEC_XXSPLTIDP))]
  "TARGET_POWER10"
 {
   long value = rs6000_const_f32_to_i32 (operands[1]);
@@ -6452,10 +6452,10 @@
 (define_insn "xxspltidp_v2df_inst"
   [(set (match_operand:V2DF 0 "register_operand" "=wa")
        (unspec:V2DF [(match_operand:SI 1 "c32bit_cint_operand" "n")]
-                    UNSPEC_XXSPLTID))]
+                    UNSPEC_XXSPLTIDP))]
   "TARGET_POWER10"
   "xxspltidp %x0,%1"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")])
 
 ;; XXSPLTI32DX built-in function support
@@ -6476,7 +6476,7 @@
                                         GEN_INT (index), operands[3]));
    DONE;
 }
- [(set_attr "type" "vecsimple")])
+ [(set_attr "type" "vecperm")])
 
 (define_insn "xxsplti32dx_v4si_inst"
   [(set (match_operand:V4SI 0 "register_operand" "=wa")
@@ -6486,7 +6486,7 @@
                     UNSPEC_XXSPLTI32DX))]
   "TARGET_POWER10"
   "xxsplti32dx %x0,%2,%3"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")])
 
 (define_expand "xxsplti32dx_v4sf"
@@ -6515,7 +6515,7 @@
                     UNSPEC_XXSPLTI32DX))]
   "TARGET_POWER10"
   "xxsplti32dx %x0,%2,%3"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")])
 
 ;; XXBLEND built-in function support
@@ -6527,7 +6527,7 @@
                    UNSPEC_XXBLEND))]
   "TARGET_POWER10"
   "xxblendv<VM3_char> %x0,%x1,%x2,%x3"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")])
 
 ;; XXPERMX built-in function support
@@ -6562,7 +6562,7 @@
 
   DONE;
 }
-  [(set_attr "type" "vecsimple")])
+  [(set_attr "type" "vecperm")])
 
 (define_insn "xxpermx_inst"
   [(set (match_operand:V2DI 0 "register_operand" "+v")
@@ -6573,7 +6573,7 @@
                     UNSPEC_XXPERMX))]
   "TARGET_POWER10"
   "xxpermx %x0,%x1,%x2,%x3,%4"
-  [(set_attr "type" "vecsimple")
+  [(set_attr "type" "vecperm")
    (set_attr "prefixed" "yes")])
 
 ;; XXEVAL built-in function support
@@ -6586,6 +6586,6 @@
                     UNSPEC_XXEVAL))]
    "TARGET_POWER10"
    "xxeval %0,%1,%2,%3,%4"
-   [(set_attr "type" "vecsimple")
+   [(set_attr "type" "vecperm")
     (set_attr "prefixed" "yes")])