aarch64: Add support for Neoverse V1 CPU

This backports the AArch64 support for Arm's Neoverse V1 CPU to binutils
2.35.

gas/ChangeLog:

	* config/tc-aarch64.c (aarch64_cpus): Add Neoverse V1.
	* doc/c-aarch64.texi: Document Neoverse V1 support.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index fa9e9d1ff233aa7d3373c10f9e4307886b08c082..113023909dcadfe6bf7a972b5e279f7d169edfce 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2020-10-02  Alex Coplan  <alex.coplan@arm.com>
+
+       * config/tc-aarch64.c (aarch64_cpus): Add Neoverse V1.
+       * doc/c-aarch64.texi: Document Neoverse V1 support.
+
 2020-09-24  Alan Modra  <amodra@gmail.com>
 
        Apply from master

diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index ecb15d2343740426a4c867a9e1a03a3414fbbc45..91692305c8967cf98c0e6c2b96c600cc4c3a8926 100644 (file)
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -8936,6 +8936,15 @@ static const struct aarch64_cpu_option_table aarch64_cpus[] = {
                                  | AARCH64_FEATURE_DOTPROD
                                  | AARCH64_FEATURE_PROFILE),
                                  "Neoverse N1"},
+  {"neoverse-v1", AARCH64_FEATURE (AARCH64_ARCH_V8_4,
+                           AARCH64_FEATURE_PROFILE
+                         | AARCH64_FEATURE_CVADP
+                         | AARCH64_FEATURE_SVE
+                         | AARCH64_FEATURE_SSBS
+                         | AARCH64_FEATURE_RNG
+                         | AARCH64_FEATURE_F16
+                         | AARCH64_FEATURE_BFLOAT16
+                         | AARCH64_FEATURE_I8MM), "Neoverse V1"},
   {"qdf24xx", AARCH64_FEATURE (AARCH64_ARCH_V8,
                               AARCH64_FEATURE_CRC | AARCH64_FEATURE_CRYPTO
                               | AARCH64_FEATURE_RDMA),

diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi
index 86b6efc52bd42a1a4964f3270087ae87316263e1..00eb6fefb32649fad4f8d1232c9cc09a9c332c54 100644 (file)
--- a/gas/doc/c-aarch64.texi
+++ b/gas/doc/c-aarch64.texi
@@ -72,6 +72,7 @@ on the target processor.  The following processor names are recognized:
 @code{exynos-m1},
 @code{falkor},
 @code{neoverse-n1},
+@code{neoverse-v1},
 @code{neoverse-e1},
 @code{qdf24xx},
 @code{saphira},