]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
drm/amdgpu: Add memory training reserve-region
authorLijo Lazar <lijo.lazar@amd.com>
Wed, 25 Mar 2026 13:40:16 +0000 (19:10 +0530)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 3 Apr 2026 17:50:04 +0000 (13:50 -0400)
Use reserve region helpers for initializing/reserving memory training
region.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

index 79a49cba8d406e3f0c03ee4210625534dda18905..7e94ec11c57e4e8b412221a7ca7243ae11ba88fe 100644 (file)
@@ -277,7 +277,6 @@ struct psp_memory_training_context {
 
        /*vram offset of the c2p training data*/
        u64 c2p_train_data_offset;
-       struct amdgpu_bo *c2p_bo;
 
        enum psp_memory_training_init_flag init;
        u32 training_cnt;
index feea4bbe5c9507c92c2a114d30ed9e166034b73f..9f02b9e3eea1c8cf71e6ffe97e9b0342d747dc96 100644 (file)
@@ -1745,8 +1745,7 @@ static int amdgpu_ttm_training_reserve_vram_fini(struct amdgpu_device *adev)
        struct psp_memory_training_context *ctx = &adev->psp.mem_train_ctx;
 
        ctx->init = PSP_MEM_TRAIN_NOT_SUPPORT;
-       amdgpu_bo_free_kernel(&ctx->c2p_bo, NULL, NULL);
-       ctx->c2p_bo = NULL;
+       amdgpu_ttm_unmark_vram_reserved(adev, AMDGPU_RESV_MEM_TRAIN);
 
        return 0;
 }
@@ -1817,14 +1816,12 @@ static int amdgpu_ttm_reserve_tmr(struct amdgpu_device *adev)
        if (mem_train_support) {
                /* reserve vram for mem train according to TMR location */
                amdgpu_ttm_training_data_block_init(adev, reserve_size);
-               ret = amdgpu_bo_create_kernel_at(adev,
-                                                ctx->c2p_train_data_offset,
-                                                ctx->train_data_size,
-                                                &ctx->c2p_bo,
-                                                NULL);
+               amdgpu_ttm_init_vram_resv(adev, AMDGPU_RESV_MEM_TRAIN,
+                                         ctx->c2p_train_data_offset,
+                                         ctx->train_data_size, false);
+               ret = amdgpu_ttm_mark_vram_reserved(adev, AMDGPU_RESV_MEM_TRAIN);
                if (ret) {
-                       dev_err(adev->dev, "alloc c2p_bo failed(%d)!\n", ret);
-                       amdgpu_ttm_training_reserve_vram_fini(adev);
+                       dev_err(adev->dev, "memory training region reservation failed(%d)!\n", ret);
                        return ret;
                }
                ctx->init = PSP_MEM_TRAIN_RESERVE_SUCCESS;