ARM: tegra: Add BSE bindings

Add device tree nodes for BSEA and BSEV devices on Tegra20 and Tegra30.

Signed-off-by: Ion Agorria <ion@agorria.com>

diff --git a/arch/arm/dts/tegra20.dtsi b/arch/arm/dts/tegra20.dtsi
index 275b3432bd88f111672a3f5161def625a6e686bf..4a40edfdfbe7be04bea24487072133229b788232 100644 (file)
--- a/arch/arm/dts/tegra20.dtsi
+++ b/arch/arm/dts/tegra20.dtsi
@@ -249,6 +249,35 @@
                */
        };
 
+       /* Audio Bitstream Engine */
+       bsea@60011000 {
+               compatible = "nvidia,tegra20-bsea";
+               reg = <0x60011000 0x1000>, <0x4000c000 0x4000>;
+               reg-names = "bsea", "iram-buffer";
+               interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "bsea";
+               clocks = <&tegra_car TEGRA20_CLK_BSEA>;
+               resets = <&tegra_car 62>;
+               reset-names = "bsea";
+               status = "disabled";
+       };
+
+       /* Video Bitstream Engine */
+       bsev@6001b000 {
+               compatible = "nvidia,tegra20-bsev";
+               reg = <0x6001b000 0x1000>, <0x40008000 0x4000>;
+               reg-names = "bsev", "iram-buffer";
+               interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "bsev";
+               clocks = <&tegra_car TEGRA20_CLK_BSEV>,
+                        <&tegra_car TEGRA20_CLK_VDE>;
+               clock-names = "bsev", "vde";
+               resets = <&tegra_car 63>,
+                        <&tegra_car 61>;
+               reset-names = "bsev", "vde";
+               status = "disabled";
+       };
+
        apbmisc@70000800 {
                compatible = "nvidia,tegra20-apbmisc";
                reg = <0x70000800 0x64   /* Chip revision */

diff --git a/arch/arm/dts/tegra30.dtsi b/arch/arm/dts/tegra30.dtsi
index d5de1ecaf054232994c4e1775f565d2ec102a73b..82e843d05be580e0012dbd6f9cc65720630ebf72 100644 (file)
--- a/arch/arm/dts/tegra30.dtsi
+++ b/arch/arm/dts/tegra30.dtsi
@@ -373,6 +373,35 @@
                */
        };
 
+       /* Audio Bitstream Engine */
+       bsea@60011000 {
+               compatible = "nvidia,tegra30-bsea";
+               reg = <0x60011000 0x1000>, <0x4000c000 0x4000>;
+               reg-names = "bsea", "iram-buffer";
+               interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "bsea";
+               clocks = <&tegra_car TEGRA30_CLK_BSEA>;
+               resets = <&tegra_car 62>;
+               reset-names = "bsea";
+               status = "disabled";
+       };
+
+       /* Video Bitstream Engine */
+       bsev@6001b000 {
+               compatible = "nvidia,tegra30-bsev";
+               reg = <0x6001b000 0x1000>, <0x40008000 0x4000>;
+               reg-names = "bsev", "iram-buffer";
+               interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "bsev";
+               clocks = <&tegra_car TEGRA30_CLK_BSEV>,
+                        <&tegra_car TEGRA30_CLK_VDE>;
+               clock-names = "bsev", "vde";
+               resets = <&tegra_car 63>,
+                        <&tegra_car 61>;
+               reset-names = "bsev", "vde";
+               status = "disabled";
+       };
+
        apbmisc@70000800 {
                compatible = "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc";
                reg = <0x70000800 0x64   /* Chip revision */