]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
ARM: dts: aspeed: Add Facebook Anacapa platform
authorPeter Shen <sjg168@gmail.com>
Fri, 19 Dec 2025 09:16:32 +0000 (17:16 +0800)
committerAndrew Jeffery <andrew@codeconstruct.com.au>
Thu, 8 Jan 2026 05:05:56 +0000 (15:35 +1030)
The Meta Anacapa BMC is the DC-SCM (Data Center Secure Control
Module) controller for the Meta OCP Open Rack Wide (ORW) compute tray.
This platform is a key component of the AMD Helios AI rack reference
design system, designed for next-generation AI workloads.

The BMC utilizes the Aspeed AST2600 SoC to manage the compute tray, which
contains up to 4 AMD Instinct MI450 Series GPUs (connected via a Broadcom
OCP NIC) and host CPUs. Its primary role is to provide essential system
control, power sequencing, and telemetry reporting for the compute complex
via the OpenBMC software stack.

For more detail on the AMD Helios reference design:

https://www.amd.com/en/blogs/2025/amd-helios-ai-rack-built-on-metas-2025-ocp-design.html

Signed-off-by: Peter Shen <sjg168@gmail.com>
Link: https://patch.msgid.link/20251219091632.1598603-3-sjg168@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
arch/arm/boot/dts/aspeed/Makefile
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts [new file with mode: 0644]

index ed25fec25fc4fadf2e55c70e3f1828cf46945cca..b3e2f76027f522b86f3f27628fedc7d024c2d40b 100644 (file)
@@ -17,6 +17,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
        aspeed-bmc-asus-x4tf.dtb \
        aspeed-bmc-bytedance-g220a.dtb \
        aspeed-bmc-delta-ahe50dc.dtb \
+       aspeed-bmc-facebook-anacapa.dtb \
        aspeed-bmc-facebook-bletchley.dtb \
        aspeed-bmc-facebook-catalina.dtb \
        aspeed-bmc-facebook-clemente.dtb \
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts
new file mode 100644 (file)
index 0000000..221af85
--- /dev/null
@@ -0,0 +1,1045 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+/dts-v1/;
+#include "aspeed-g6.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/i2c/i2c.h>
+
+/ {
+       model = "Facebook Anacapa BMC";
+       compatible = "facebook,anacapa-bmc", "aspeed,ast2600";
+
+       aliases {
+               serial0 = &uart1;
+               serial1 = &uart2;
+               serial2 = &uart3;
+               serial3 = &uart4;
+               serial4 = &uart5;
+               i2c16 = &i2c0mux0ch0;
+               i2c17 = &i2c0mux0ch1;
+               i2c18 = &i2c0mux0ch2;
+               i2c19 = &i2c0mux0ch3;
+               i2c20 = &i2c1mux0ch0;
+               i2c21 = &i2c1mux0ch1;
+               i2c22 = &i2c1mux0ch2;
+               i2c23 = &i2c1mux0ch3;
+               i2c24 = &i2c4mux0ch0;
+               i2c25 = &i2c4mux0ch1;
+               i2c26 = &i2c4mux0ch2;
+               i2c27 = &i2c4mux0ch3;
+               i2c28 = &i2c4mux0ch4;
+               i2c29 = &i2c4mux0ch5;
+               i2c30 = &i2c4mux0ch6;
+               i2c31 = &i2c4mux0ch7;
+               i2c32 = &i2c8mux0ch0;
+               i2c33 = &i2c8mux0ch1;
+               i2c34 = &i2c8mux0ch2;
+               i2c35 = &i2c8mux0ch3;
+               i2c36 = &i2c10mux0ch0;
+               i2c37 = &i2c10mux0ch1;
+               i2c38 = &i2c10mux0ch2;
+               i2c39 = &i2c10mux0ch3;
+               i2c40 = &i2c10mux0ch4;
+               i2c41 = &i2c10mux0ch5;
+               i2c42 = &i2c10mux0ch6;
+               i2c43 = &i2c10mux0ch7;
+               i2c44 = &i2c11mux0ch0;
+               i2c45 = &i2c11mux0ch1;
+               i2c46 = &i2c11mux0ch2;
+               i2c47 = &i2c11mux0ch3;
+               i2c48 = &i2c11mux0ch4;
+               i2c49 = &i2c11mux0ch5;
+               i2c50 = &i2c11mux0ch6;
+               i2c51 = &i2c11mux0ch7;
+               i2c52 = &i2c13mux0ch0;
+               i2c53 = &i2c13mux0ch1;
+               i2c54 = &i2c13mux0ch2;
+               i2c55 = &i2c13mux0ch3;
+               i2c56 = &i2c13mux0ch4;
+               i2c57 = &i2c13mux0ch5;
+               i2c58 = &i2c13mux0ch6;
+               i2c59 = &i2c13mux0ch7;
+       };
+
+       chosen {
+               stdout-path = "serial4:57600n8";
+       };
+
+       iio-hwmon {
+               compatible = "iio-hwmon";
+               io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
+                                 <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
+                                 <&adc1 2>;
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               led-0 {
+                       label = "bmc_heartbeat_amber";
+                       gpios = <&gpio0 ASPEED_GPIO(P, 7) GPIO_ACTIVE_LOW>;
+                       linux,default-trigger = "heartbeat";
+               };
+
+               led-1 {
+                       label = "fp_id_amber";
+                       default-state = "off";
+                       gpios = <&gpio0 ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       memory@80000000 {
+               device_type = "memory";
+               reg = <0x80000000 0x80000000>;
+       };
+
+       reserved-memory {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+
+               video_engine_memory: video {
+                       size = <0x02c00000>;
+                       alignment = <0x00100000>;
+                       compatible = "shared-dma-pool";
+                       reusable;
+               };
+
+               gfx_memory: framebuffer {
+                       size = <0x01000000>;
+                       alignment = <0x01000000>;
+                       compatible = "shared-dma-pool";
+                       reusable;
+               };
+       };
+
+       p3v3_bmc_aux: regulator-p3v3-bmc-aux {
+               compatible = "regulator-fixed";
+               regulator-name = "p3v3_bmc_aux";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+       };
+
+       spi_gpio: spi {
+               compatible = "spi-gpio";
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
+               mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
+               miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
+               cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
+               num-chipselects = <1>;
+               status = "okay";
+
+               tpm@0 {
+                       compatible = "infineon,slb9670", "tcg,tpm_tis-spi";
+                       spi-max-frequency = <33000000>;
+                       reg = <0>;
+               };
+       };
+};
+
+&adc0 {
+       aspeed,int-vref-microvolt = <2500000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
+               &pinctrl_adc2_default &pinctrl_adc3_default
+               &pinctrl_adc4_default &pinctrl_adc5_default
+               &pinctrl_adc6_default &pinctrl_adc7_default>;
+       status = "okay";
+};
+
+&adc1 {
+       aspeed,int-vref-microvolt = <2500000>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_adc10_default>;
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&fmc {
+       status = "okay";
+
+       flash@0 {
+               status = "okay";
+               m25p,fast-read;
+               label = "bmc";
+               spi-max-frequency = <50000000>;
+#include "openbmc-flash-layout-128.dtsi"
+       };
+
+       flash@1 {
+               status = "okay";
+               m25p,fast-read;
+               label = "alt-bmc";
+               spi-max-frequency = <50000000>;
+       };
+};
+
+&gfx {
+       status = "okay";
+       memory-region = <&gfx_memory>;
+};
+
+&gpio0 {
+       gpio-line-names =
+
+       /*A0-A7*/
+       "","","","","","","","",
+
+       /*B0-B7*/
+       "BATTERY_DETECT", "", "", "BMC_READY",
+       "", "FM_ID_LED", "", "",
+
+       /*C0-C7*/
+       "","","","","","","","",
+
+       /*D0-D7*/
+       "","","","","","","","",
+
+       /*E0-E7*/
+       "","","","","","","","",
+
+       /*F0-F7*/
+       "","","","","","","","",
+
+       /*G0-G7*/
+       "FM_MUX1_SEL", "", "", "",
+       "", "", "FM_DEBUG_PORT_PRSNT_N", "FM_BMC_DBP_PRESENT_N",
+
+       /*H0-H7*/
+       "","","","","","","","",
+
+       /*I0-I7*/
+       "", "", "", "",
+       "", "FLASH_WP_STATUS", "BMC_JTAG_MUX_SEL", "",
+
+       /*J0-J7*/
+       "","","","","","","","",
+
+       /*K0-K7*/
+       "","","","","","","","",
+
+       /*L0-L7*/
+       "","","","","","","","",
+
+       /*M0-M7*/
+       "", "BMC_FRU_WP", "", "",
+       "", "", "", "",
+
+       /*N0-N7*/
+       "LED_POSTCODE_0", "LED_POSTCODE_1", "LED_POSTCODE_2", "LED_POSTCODE_3",
+       "LED_POSTCODE_4", "LED_POSTCODE_5", "LED_POSTCODE_6", "LED_POSTCODE_7",
+
+       /*O0-O7*/
+       "","","","","","","","",
+
+       /*P0-P7*/
+       "PWR_BTN_BMC_BUF_N", "", "ID_RST_BTN_BMC_N", "",
+       "PWR_LED", "", "", "BMC_HEARTBEAT_N",
+
+       /*Q0-Q7*/
+       "","","","","","","","",
+
+       /*R0-R7*/
+       "","","","","","","","",
+
+       /*S0-S7*/
+       "", "", "SYS_BMC_PWRBTN_N", "",
+       "", "", "", "RUN_POWER_FAULT",
+
+       /*T0-T7*/
+       "","","","","","","","",
+
+       /*U0-U7*/
+       "","","","","","","","",
+
+       /*V0-V7*/
+       "","","","","","","","",
+
+       /*W0-W7*/
+       "","","","","","","","",
+
+       /*X0-X7*/
+       "","","","","","","","",
+
+       /*Y0-Y7*/
+       "","","","","","","","",
+
+       /*Z0-Z7*/
+       "SPI_BMC_TPM_CS2_N", "", "", "SPI_BMC_TPM_CLK",
+       "SPI_BMC_TPM_MOSI", "SPI_BMC_TPM_MISO", "", "";
+};
+
+&gpio1 {
+       gpio-line-names =
+       /*18A0-18A7*/
+       "","","","","","","","",
+
+       /*18B0-18B7*/
+       "","","","",
+       "FM_BOARD_BMC_REV_ID0", "FM_BOARD_BMC_REV_ID1",
+       "FM_BOARD_BMC_REV_ID2", "",
+
+       /*18C0-18C7*/
+       "","","","","","","","",
+
+       /*18D0-18D7*/
+       "","","","","","","","",
+
+       /*18E0-18E3*/
+       "FM_BMC_PROT_LS_EN", "AC_PWR_BMC_BTN_N", "", "";
+};
+
+// L Bridge Board
+&i2c0 {
+       status = "okay";
+
+       i2c-mux@70 {
+               compatible = "nxp,pca9546";
+               reg = <0x70>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               i2c-mux-idle-disconnect;
+
+               i2c0mux0ch0: i2c@0 {
+                       reg = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c0mux0ch1: i2c@1 {
+                       reg = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c0mux0ch2: i2c@2 {
+                       reg = <2>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c0mux0ch3: i2c@3 {
+                       reg = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+};
+
+// R Bridge Board
+&i2c1 {
+       status = "okay";
+
+       i2c-mux@70 {
+               compatible = "nxp,pca9546";
+               reg = <0x70>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               i2c-mux-idle-disconnect;
+
+               i2c1mux0ch0: i2c@0 {
+                       reg = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c1mux0ch1: i2c@1 {
+                       reg = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c1mux0ch2: i2c@2 {
+                       reg = <2>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c1mux0ch3: i2c@3 {
+                       reg = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+};
+
+// MB - E1.S
+&i2c4 {
+       status = "okay";
+
+       i2c-mux@70 {
+               compatible = "nxp,pca9548";
+               reg = <0x70>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               i2c-mux-idle-disconnect;
+
+               i2c4mux0ch0: i2c@0 {
+                       reg = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c4mux0ch1: i2c@1 {
+                       reg = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c4mux0ch2: i2c@2 {
+                       reg = <2>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c4mux0ch3: i2c@3 {
+                       reg = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c4mux0ch4: i2c@4 {
+                       reg = <4>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c4mux0ch5: i2c@5 {
+                       reg = <5>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c4mux0ch6: i2c@6 {
+                       reg = <6>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c4mux0ch7: i2c@7 {
+                       reg = <7>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+};
+
+// AMC
+&i2c5 {
+       status = "okay";
+};
+
+// MB
+&i2c6 {
+       status = "okay";
+
+       // HPM FRU
+       eeprom@50 {
+               compatible = "atmel,24c256";
+               reg = <0x50>;
+       };
+};
+
+// SCM
+&i2c7 {
+       status = "okay";
+
+
+};
+
+// MB - PDB
+&i2c8 {
+       status = "okay";
+
+       i2c-mux@72 {
+               compatible = "nxp,pca9546";
+               reg = <0x72>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               i2c-mux-idle-disconnect;
+
+               i2c8mux0ch0: i2c@0 {
+                       reg = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       adc@1f {
+                               compatible = "ti,adc128d818";
+                               reg = <0x1f>;
+                               ti,mode = /bits/ 8 <1>;
+                       };
+
+                       gpio@22 {
+                               compatible = "nxp,pca9555";
+                               reg = <0x22>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+
+                               gpio-line-names =
+                                       "RPDB_FAN_FULL_SPEED_R_N", "RPDB_I2C_TEMP75_U8_ALERT_R_N",
+                                       "RPDB_I2C_TMP432_U29_ALERT_R_N", "RPDB_GLOBAL_WP",
+                                       "RPDB_FAN_CT_FAN_FAIL_R_N", "",
+                                       "", "",
+                                       "RPDB_ALERT_P50V_HSC2_R_N", "RPDB_ALERT_P50V_HSC3_R_N",
+                                       "RPDB_ALERT_P50V_HSC4_R_N", "RPDB_ALERT_P50V_STBY_R_N",
+                                       "RPDB_I2C_P12V_MB_VRM_ALERT_R_N",
+                                       "RPDB_I2C_P12V_STBY_VRM_ALERT_R_N",
+                                       "RPDB_PGD_P3V3_STBY_PWRGD_R",
+                                       "RPDB_P12V_STBY_VRM_PWRGD_BUF_R";
+                       };
+
+                       gpio@24 {
+                               compatible = "nxp,pca9555";
+                               reg = <0x24>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+
+                               gpio-line-names =
+                                       "RPDB_EAM2_PRSNT_MOS_N_R", "RPDB_EAM3_PRSNT_MOS_N_R",
+                                       "RPDB_PWRGD_P50V_HSC4_SYS_R",
+                                       "RPDB_PWRGD_P50V_STBY_SYS_BUF_R",
+                                       "RPDB_P50V_FAN1_R2_PG", "RPDB_P50V_FAN2_R2_PG",
+                                       "RPDB_P50V_FAN3_R2_PG", "RPDB_P50V_FAN4_R2_PG",
+                                       "", "RPDB_FAN1_PRSNT_N_R",
+                                       "", "RPDB_FAN2_PRSNT_N_R",
+                                       "RPDB_FAN3_PRSNT_N_R", "RPDB_FAN4_PRSNT_N_R",
+                                       "", "";
+                       };
+
+                       // R-PDB FRU
+                       eeprom@50 {
+                               compatible = "atmel,24c128";
+                               reg = <0x50>;
+                       };
+               };
+               i2c8mux0ch1: i2c@1 {
+                       reg = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       gpio@22 {
+                               compatible = "nxp,pca9555";
+                               reg = <0x22>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+
+                               gpio-line-names =
+                                       "LPDB_FAN_FULL_SPEED_R_N","LPDB_I2C_TEMP75_U8_ALERT_R_N",
+                                       "LPDB_I2C_TMP432_U29_ALERT_R_N","LPDB_GLOBAL_WP",
+                                       "LPDB_FAN_CT_FAN_FAIL_R_N","",
+                                       "","",
+                                       "LPDB_ALERT_P50V_HSC0_R_N","LPDB_ALERT_P50V_HSC1_R_N",
+                                       "LPDB_ALERT_P50V_HSC5_R_N","LPDB_I2C_P12V_SW_VRM_ALERT_R_N",
+                                       "LPDB_EAM0_PRSNT_MOS_N_R","LPDB_EAM1_PRSNT_MOS_N_R",
+                                       "LPDB_PWRGD_P50V_HSC5_SYS_R","";
+                       };
+
+                       gpio@24 {
+                               compatible = "nxp,pca9555";
+                               reg = <0x24>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+
+                               gpio-line-names =
+                                       "LPDB_P50V_FAN1_R2_PG","LPDB_P50V_FAN2_R2_PG",
+                                       "LPDB_P50V_FAN3_R2_PG","LPDB_P50V_FAN4_R2_PG",
+                                       "LPDB_P50V_FAN5_R2_PG","LPDB_FAN1_PRSNT_N_R",
+                                       "LPDB_FAN2_PRSNT_N_R","LPDB_FAN3_PRSNT_N_R",
+                                       "LPDB_FAN4_PRSNT_N_R","LPDB_FAN5_PRSNT_N_R",
+                                       "","",
+                                       "","",
+                                       "","";
+                       };
+
+                       // L-PDB FRU
+                       eeprom@50 {
+                               compatible = "atmel,24c128";
+                               reg = <0x50>;
+                       };
+               };
+               i2c8mux0ch2: i2c@2 {
+                       reg = <2>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c8mux0ch3: i2c@3 {
+                       reg = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+};
+
+// SCM
+&i2c9 {
+       status = "okay";
+
+       // SCM FRU
+       eeprom@50 {
+               compatible = "atmel,24c128";
+               reg = <0x50>;
+       };
+
+       // BSM FRU
+       eeprom@56 {
+               compatible = "atmel,24c64";
+               reg = <0x56>;
+       };
+};
+
+// R Bridge Board
+&i2c10 {
+       status = "okay";
+
+       i2c-mux@71 {
+               compatible = "nxp,pca9548";
+               reg = <0x71>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               i2c-mux-idle-disconnect;
+
+               i2c10mux0ch0: i2c@0 {
+                       reg = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c10mux0ch1: i2c@1 {
+                       reg = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c10mux0ch2: i2c@2 {
+                       reg = <2>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c10mux0ch3: i2c@3 {
+                       reg = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c10mux0ch4: i2c@4 {
+                       reg = <4>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c10mux0ch5: i2c@5 {
+                       reg = <5>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       gpio@22 {
+                               compatible = "nxp,pca9555";
+                               reg = <0x22>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+
+                               gpio-line-names =
+                                       "","",
+                                       "","RBB_CPLD_REFRESH_IN_PRGRS_R_L",
+                                       "RBB_EAM0_NIC_CBL_PRSNT_R_L","RBB_EAM1_NIC_CBL_PRSNT_R_L",
+                                       "RBB_AINIC_JTAG_MUX_R2_SEL","RBB_SPI_MUX0_R2_SEL",
+                                       "RBB_AINIC_PRSNT_R_L","RBB_AINIC_OE_R_N",
+                                       "RBB_AINIC_BOARD_R2_ID","RBB_RST_USB2_HUB_R_N",
+                                       "RBB_RST_FT4222_R_N","RBB_RST_MCP2210_R_N",
+                                       "","";
+                       };
+
+                       // R Bridge Board FRU
+                       eeprom@52 {
+                               compatible = "atmel,24c256";
+                               reg = <0x52>;
+                       };
+               };
+               i2c10mux0ch6: i2c@6 {
+                       reg = <6>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c10mux0ch7: i2c@7 {
+                       reg = <7>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+};
+
+// L Bridge Board
+&i2c11 {
+       status = "okay";
+
+       i2c-mux@71 {
+               compatible = "nxp,pca9548";
+               reg = <0x71>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               i2c-mux-idle-disconnect;
+
+               i2c11mux0ch0: i2c@0 {
+                       reg = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c11mux0ch1: i2c@1 {
+                       reg = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c11mux0ch2: i2c@2 {
+                       reg = <2>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c11mux0ch3: i2c@3 {
+                       reg = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c11mux0ch4: i2c@4 {
+                       reg = <4>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c11mux0ch5: i2c@5 {
+                       reg = <5>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       gpio@22 {
+                               compatible = "nxp,pca9555";
+                               reg = <0x22>;
+                               gpio-controller;
+                               #gpio-cells = <2>;
+
+                               gpio-line-names =
+                                       "","",
+                                       "","LBB_CPLD_REFRESH_IN_PRGRS_R_L",
+                                       "LBB_EAM0_NIC_CBL_PRSNT_R_L","LBB_EAM1_NIC_CBL_PRSNT_R_L",
+                                       "LBB_AINIC_JTAG_MUX_R2_SEL","LBB_SPI_MUX0_R2_SEL",
+                                       "LBB_AINIC_PRSNT_R_L","LBB_AINIC_OE_R_N",
+                                       "LBB_AINIC_BOARD_R2_ID","LBB_RST_USB2_HUB_R_N",
+                                       "LBB_RST_FT4222_R_N","LBB_RST_MCP2210_R_N",
+                                       "","";
+                       };
+
+                       // L Bridge Board FRU
+                       eeprom@52 {
+                               compatible = "atmel,24c256";
+                               reg = <0x52>;
+                       };
+               };
+               i2c11mux0ch6: i2c@6 {
+                       reg = <6>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c11mux0ch7: i2c@7 {
+                       reg = <7>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+};
+
+// Debug Card
+&i2c12 {
+       status = "okay";
+};
+
+// MB
+&i2c13 {
+       status = "okay";
+
+       i2c-mux@70 {
+               compatible = "nxp,pca9548";
+               reg = <0x70>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               i2c-mux-idle-disconnect;
+
+               i2c13mux0ch0: i2c@0 {
+                       reg = <0>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c13mux0ch1: i2c@1 {
+                       reg = <1>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c13mux0ch2: i2c@2 {
+                       reg = <2>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c13mux0ch3: i2c@3 {
+                       reg = <3>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       adc@1f {
+                               compatible = "ti,adc128d818";
+                               reg = <0x1f>;
+                               ti,mode = /bits/ 8 <1>;
+                       };
+               };
+               i2c13mux0ch4: i2c@4 {
+                       reg = <4>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       // HPM BRD ID FRU
+                       eeprom@51 {
+                               compatible = "atmel,24c256";
+                               reg = <0x51>;
+                       };
+               };
+               i2c13mux0ch5: i2c@5 {
+                       reg = <5>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c13mux0ch6: i2c@6 {
+                       reg = <6>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+               i2c13mux0ch7: i2c@7 {
+                       reg = <7>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+               };
+       };
+};
+
+// SCM
+&i2c14 {
+       status = "okay";
+};
+
+&i2c15 {
+       status = "okay";
+};
+
+&kcs2 {
+       aspeed,lpc-io-reg = <0xca8>;
+       status = "okay";
+};
+
+&kcs3 {
+       aspeed,lpc-io-reg = <0xca2>;
+       status = "okay";
+};
+
+&lpc_ctrl {
+       status = "okay";
+};
+
+&mac2 {
+       status = "okay";
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_ncsi3_default>;
+       use-ncsi;
+};
+
+&sgpiom0 {
+       ngpios = <128>;
+       bus-frequency = <2000000>;
+       gpio-line-names =
+       /*in - out - in - out */
+       /* A0-A7 line 0-15 */
+       "", "FM_CPU0_SYS_RESET_N", "", "CPU0_KBRST_N",
+       "", "FM_CPU0_PROCHOT_trigger_N", "", "FM_CLR_CMOS_R_P0",
+       "", "Force_I3C_SEL", "", "SYSTEM_Force_Run_AC_Cycle",
+       "", "", "", "",
+
+       /* B0-B7 line 16-31 */
+       "Channel0_leakage_EAM3", "FM_CPU_FPGA_JTAG_MUX_SEL",
+       "Channel1_leakage_EAM0", "FM_SCM_JTAG_MUX_SEL",
+       "Channel2_leakage_Manifold1", "FM_BRIDGE_JTAG_MUX_SEL",
+       "Channel3_leakage", "FM_CPU0_NMI_SYNC_FLOOD_N",
+       "Channel4_leakage_Manifold2", "",
+       "Channel5_leakage_EAM1", "",
+       "Channel6_leakage_CPU_DIMM", "",
+       "Channel7_leakage_EAM2", "",
+
+       /* C0-C7 line 32-47 */
+       "RSVD_RMC_GPIO3", "", "", "",
+       "", "", "", "",
+       "LEAK_DETECT_RMC_N", "", "", "",
+       "", "", "", "",
+
+       /* D0-D7 line 48-63 */
+       "PWRGD_PDB_EAMHSC0_CPLD_PG_R", "",
+       "PWRGD_PDB_EAMHSC1_CPLD_PG_R", "",
+       "PWRGD_PDB_EAMHSC2_CPLD_PG_R", "",
+       "PWRGD_PDB_EAMHSC3_CPLD_PG_R", "",
+       "AMC_BRD_PRSNT_CPLD_L", "", "", "",
+       "", "", "", "",
+
+       /* E0-E7 line 64-79 */
+       "AMC_PDB_EAMHSC0_CPLD_EN_R", "",
+       "AMC_PDB_EAMHSC1_CPLD_EN_R", "",
+       "AMC_PDB_EAMHSC2_CPLD_EN_R", "",
+       "AMC_PDB_EAMHSC3_CPLD_EN_R", "",
+       "", "", "", "",
+       "", "", "", "",
+
+       /* F0-F7 line 80-95 */
+       "PWRGD_PVDDCR_CPU1_P0", "SGPIO_READY",
+       "PWRGD_PVDDCR_CPU0_P0", "",
+       "", "", "", "",
+       "", "", "", "",
+
+       /* G0-G7 line 96-111 */
+       "PWRGD_PVDDCR_SOC_P0", "",
+       "PWRGD_PVDDIO_P0", "",
+       "PWRGD_PVDDIO_MEM_S3_P0", "",
+       "PWRGD_CHMP_CPU0_FPGA", "",
+       "PWRGD_CHIL_CPU0_FPGA", "",
+       "PWRGD_CHEH_CPU0_FPGA", "",
+       "PWRGD_CHAD_CPU0_FPGA", "FM_BMC_READY_PLD",
+       "", "",
+
+       /* H0-H7 line 112-127 */
+       "PWRGD_P3V3", "",
+       "P12V_DDR_IP_PWRGD_R", "",
+       "P12V_DDR_AH_PWRGD_R", "",
+       "PWRGD_P12V_VRM1_CPLD_PG_R", "",
+       "PWRGD_P12V_VRM0_CPLD_PG_R", "",
+       "PWRGD_PDB_HSC4_CPLD_PG_R", "",
+       "PWRGD_PVDD18_S5_P0_PG", "",
+       "PWRGD_PVDD33_S5_P0_PG", "",
+
+       /* I0-I7 line 128-143 */
+       "EAM0_BRD_PRSNT_R_L", "",
+       "EAM1_BRD_PRSNT_R_L", "",
+       "EAM2_BRD_PRSNT_R_L", "",
+       "EAM3_BRD_PRSNT_R_L", "",
+       "EAM0_CPU_MOD_PWR_GD_R", "",
+       "EAM1_CPU_MOD_PWR_GD_R", "",
+       "EAM2_CPU_MOD_PWR_GD_R", "",
+       "EAM3_CPU_MOD_PWR_GD_R", "",
+
+       /* J0-J7 line 144-159 */
+       "PRSNT_L_BIRDGE_R", "",
+       "PRSNT_R_BIRDGE_R", "",
+       "BRIDGE_L_MAIN_PG_R", "",
+       "BRIDGE_R_MAIN_PG_R", "",
+       "BRIDGE_L_STBY_PG_R", "",
+       "BRIDGE_R_STBY_PG_R", "",
+       "", "", "", "",
+
+       /* K0-K7 line 160-175 */
+       "ADC_I2C_ALERT_N", "",
+       "TEMP_I2C_ALERT_R_L", "",
+       "CPU0_VR_SMB_ALERT_CPLD_N", "",
+       "COVER_INTRUDER_R_N", "",
+       "HANDLE_INTRUDER_CPLD_N", "",
+       "IRQ_MCIO_CPLD_WAKE_R_N", "",
+       "APML_CPU0_ALERT_R_N", "",
+       "PDB_ALERT_R_N", "",
+
+       /* L0-L7 line 176-191 */
+       "CPU0_SP7R1", "", "CPU0_SP7R2", "",
+       "CPU0_SP7R3", "", "CPU0_SP7R4", "",
+       "CPU0_CORETYPE0", "", "CPU0_CORETYPE1", "",
+       "CPU0_CORETYPE2", "", "FM_BIOS_POST_CMPLT_R_N", "",
+
+       /* M0-M7 line 192-207 */
+       "EAM0_SMERR_CPLD_R_L", "",
+       "EAM1_SMERR_CPLD_R_L", "",
+       "EAM2_SMERR_CPLD_R_L", "",
+       "EAM3_SMERR_CPLD_R_L", "",
+       "CPU0_SMERR_N_R", "",
+       "CPU0_NV_SAVE_N_R", "",
+       "PDB_PWR_LOSS_CPLD_N", "",
+       "IRQ_BMC_SMI_ACTIVE_R_N", "",
+
+       /* N0-N7 line 208-223 */
+       "AMCROT_BMC_S5_RDY_R", "",
+       "AMC_RDY_R", "",
+       "AMC_STBY_PGOOD_R", "",
+       "CPU_AMC_SLP_S5_R_L", "",
+       "AMC_CPU_EAMPG_R", "",
+       "", "", "", "",
+
+       /* O0-O7 line 224-239 */
+       "HPM_PWR_FAIL", "Port80_b0",
+       "FM_DIMM_IP_FAIL", "Port80_b1",
+       "FM_DIMM_AH_FAIL", "Port80_b2",
+       "HPM_AMC_THERMTRIP_R_L", "Port80_b3",
+       "FM_CPU0_THERMTRIP_N", "Port80_b4",
+       "PVDDCR_SOC_P0_OCP_L", "Port80_b5",
+       "CPLD_SGPIO_RDY", "Port80_b6",
+       "", "Port80_b7",
+
+       /* P0-P7 line 240-255 */
+       "CPU0_SLP_S5_N_R", "NFC_VEN",
+       "CPU0_SLP_S3_N_R", "",
+       "FM_CPU0_PWRGD", "",
+       "PWRGD_RMC", "",
+       "FM_RST_CPU0_RESET_N", "",
+       "FM_PWRGD_CPU0_PWROK", "",
+       "wS5_PWR_Ready", "",
+       "wS0_ON_N", "PWRGD_P1V0_AUX";
+       status = "okay";
+};
+
+// BIOS Flash
+&spi2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_spi2_default>;
+       status = "okay";
+       reg = <0x1e631000 0xc4>, <0x50000000 0x8000000>;
+
+       flash@0 {
+               compatible = "jedec,spi-nor";
+               label = "pnor";
+               spi-max-frequency = <12000000>;
+               spi-tx-bus-width = <2>;
+               spi-rx-bus-width = <2>;
+               status = "okay";
+       };
+};
+
+// HOST BIOS Debug
+&uart1 {
+       status = "okay";
+};
+
+&uart3 {
+       status = "okay";
+};
+
+&uart4 {
+       status = "okay";
+};
+
+// BMC Debug Console
+&uart5 {
+       status = "okay";
+};
+
+&uart_routing {
+       status = "okay";
+};
+
+&uhci {
+       status = "okay";
+};
+
+&vhub {
+       status = "okay";
+       pinctrl-names = "default";
+};
+
+&video {
+       status = "okay";
+       memory-region = <&video_engine_memory>;
+};
+
+&wdt1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_wdtrst1_default>;
+       aspeed,reset-type = "soc";
+       aspeed,external-signal;
+       aspeed,ext-push-pull;
+       aspeed,ext-active-high;
+       aspeed,ext-pulse-duration = <256>;
+       status = "okay";
+};