// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2022 NXP
+ * Copyright 2022, 2026 NXP
*/
#include <command.h>
DECLARE_GLOBAL_DATA_PTR;
+#define CORE_CM33 0
+#define CORE_CM7 1
+#define CORE_CM71 7
+#define CORE_CM33S 8
+
int arch_auxiliary_core_check_up(u32 core_id)
{
struct arm_smccc_res res;
- arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_MCU_STARTED, 0, 0,
+ arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_MCU_STARTED, 0, core_id,
0, 0, 0, 0, &res);
return res.a0;
printf("## Stopping auxiliary core\n");
- arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_MCU_STOP, 0, 0,
+ arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_MCU_STOP, 0, core_id,
0, 0, 0, 0, &res);
return 0;
{
struct arm_smccc_res res;
- if (!addr)
- return -EINVAL;
-
printf("## Starting auxiliary core addr = 0x%08lX...\n", addr);
- arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_MCU_START, addr, 0,
+ arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_MCU_START, addr, core_id,
+ 0, 0, 0, 0, &res);
+
+ return 0;
+}
+
+#if IS_ENABLED(CONFIG_SCMI_FIRMWARE)
+int arch_auxiliary_core_prepare(u32 core_id)
+{
+ struct arm_smccc_res res;
+
+ printf("## Preparing auxiliary core: %d\n", core_id);
+
+ arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_MCU_PREP, 0, core_id,
+ 0, 0, 0, 0, &res);
+
+ return res.a0;
+}
+
+int arch_auxiliary_core_prepared(u32 core_id)
+{
+ struct arm_smccc_res res;
+
+ arm_smccc_smc(IMX_SIP_SRC, IMX_SIP_SRC_MCU_PREPED, 0, core_id,
0, 0, 0, 0, &res);
+ return res.a0;
+}
+#else
+int arch_auxiliary_core_prepare(u32 core_id)
+{
return 0;
}
+bool arch_auxiliary_core_prepared(u32 core_id)
+{
+ return true;
+}
+#endif
+
static inline bool check_in_ddr(ulong addr)
{
int i;
return false;
}
-static inline bool check_in_tcm(ulong addr, bool mcore_view)
+static inline bool check_in_tcm(u32 core_id, ulong addr, bool mcore_view)
{
if (mcore_view) {
- if ((addr >= TCML_BASE_MCORE_SEC_ADDR &&
- addr < TCML_BASE_MCORE_SEC_ADDR + TCML_SIZE) ||
- (addr >= TCMU_BASE_MCORE_SEC_ADDR &&
- addr < TCMU_BASE_MCORE_SEC_ADDR + TCMU_SIZE))
- return true;
-
- if ((addr >= TCML_BASE_MCORE_NSEC_ADDR &&
- addr < TCML_BASE_MCORE_NSEC_ADDR + TCML_SIZE) ||
- (addr >= TCMU_BASE_MCORE_NSEC_ADDR &&
- addr < TCMU_BASE_MCORE_NSEC_ADDR + TCMU_SIZE))
- return true;
+ if (core_id == CORE_CM33 || core_id == CORE_CM33S) {
+ if ((addr >= TCML_BASE_MCORE_SEC_ADDR &&
+ addr < TCML_BASE_MCORE_SEC_ADDR + TCML_SIZE) ||
+ (addr >= TCMU_BASE_MCORE_SEC_ADDR &&
+ addr < TCMU_BASE_MCORE_SEC_ADDR + TCMU_SIZE))
+ return true;
+
+ if ((addr >= TCML_BASE_MCORE_NSEC_ADDR &&
+ addr < TCML_BASE_MCORE_NSEC_ADDR + TCML_SIZE) ||
+ (addr >= TCMU_BASE_MCORE_NSEC_ADDR &&
+ addr < TCMU_BASE_MCORE_NSEC_ADDR + TCMU_SIZE))
+ return true;
+ } else if (core_id == CORE_CM7 || core_id == CORE_CM71) {
+ if (addr >= M7_TCML_BASE_MCORE_ADDR &&
+ addr < M7_TCML_BASE_MCORE_ADDR + M7_TCML_MAX_SIZE)
+ return true;
+ }
} else {
- if ((addr >= TCML_BASE_ADDR &&
- addr < TCML_BASE_ADDR + TCML_SIZE) ||
- (addr >= TCMU_BASE_ADDR &&
- addr < TCMU_BASE_ADDR + TCMU_SIZE))
- return true;
+ if (core_id == CORE_CM33 || core_id == CORE_CM33S) {
+ if ((addr >= TCML_BASE_ADDR &&
+ addr < TCML_BASE_ADDR + TCML_SIZE) ||
+ (addr >= TCMU_BASE_ADDR &&
+ addr < TCMU_BASE_ADDR + TCMU_SIZE))
+ return true;
+ } else if (core_id == CORE_CM7) {
+ if (addr >= M7_TCML_BASE_ADDR &&
+ addr < M7_TCML_BASE_ADDR + M7_TCML_MAX_SIZE)
+ return true;
+ } else if (core_id == CORE_CM71) {
+ if (addr >= M71_TCML_BASE_ADDR &&
+ addr < M71_TCML_BASE_ADDR + M7_TCML_MAX_SIZE)
+ return true;
+ }
}
return false;
}
}
#if IS_ENABLED(CONFIG_AHAB_BOOT)
-static int authenticate_auxcore_container(ulong addr, ulong *entry)
+static int authenticate_auxcore_container(u32 core_id, ulong addr, ulong *entry)
{
struct container_hdr *phdr;
int i, ret = 0;
return -EINVAL;
}
- if (!check_in_ddr(addr) && !check_in_tcm(addr, false) && !check_in_flexspi(addr)) {
+ if (!check_in_ddr(addr) && !check_in_tcm(core_id, addr, false) &&
+ !check_in_flexspi(addr)) {
printf("Error: Container's address is invalid\n");
return -EINVAL;
}
i * sizeof(struct boot_img_t));
/* Check Core ID of M core */
- if ((img->meta & 0xff) != 0) {
+ if ((img->meta & 0xff) != core_id) {
printf("Error: Wrong Image core ID, meta = 0x%x\n", img->meta);
ret = -EFAULT;
break;
break;
}
} else {
- if (!check_in_ddr(img->dst) && !check_in_tcm(img->dst, false)) {
+ if (!check_in_ddr(img->dst) &&
+ !check_in_tcm(core_id, img->dst, false)) {
printf("Error: Invalid Image[%u] load address 0x%llx\n",
i, img->dst);
ret = -EFAULT;
return CMD_RET_SUCCESS;
}
+ up = arch_auxiliary_core_prepared(core);
+ if (!up) {
+ printf("## Not prepared, run 'prepaux [coreid]' first\n");
+ return CMD_RET_FAILURE;
+ }
+
addr = simple_strtoul(argv[1], NULL, 16);
if (!addr)
printf("Authenticate auxcore container at 0x%lx\n", addr);
- ret = authenticate_auxcore_container(addr, &entry);
+ ret = authenticate_auxcore_container(core, addr, &entry);
if (ret) {
printf("Authenticate container failed %d\n", ret);
return CMD_RET_FAILURE;
}
- if (!check_in_ddr(entry) && !check_in_tcm(entry, true) &&
+ if (!check_in_ddr(entry) && !check_in_tcm(core, entry, true) &&
!check_in_flexspi(entry)) {
printf("Error: Image's entry 0x%lx is invalid\n", entry);
return CMD_RET_FAILURE;
return CMD_RET_SUCCESS;
}
+ up = arch_auxiliary_core_prepared(core);
+ if (!up) {
+ printf("## Not prepared, run 'prepaux [coreid]' first\n");
+ return CMD_RET_FAILURE;
+ }
+
addr = simple_strtoul(argv[1], NULL, 16);
- if (!addr)
+ if ((core != CORE_CM7 && core != CORE_CM71) && !addr) {
+ printf("Invalid address 0x%lx for core: %d\n", addr, core);
return CMD_RET_FAILURE;
+ }
- if (!check_in_ddr(addr) && !check_in_tcm(addr, true) && !check_in_flexspi(addr)) {
+ if (!check_in_ddr(addr) && !check_in_tcm(core, addr, true) && !check_in_flexspi(addr)) {
printf("Error: Image's address 0x%lx is invalid\n", addr);
printf(" Address should be memory from M core view,\n"
" For example: 0x1ffe0000 for TCML in secure\n");
char *const argv[])
{
int ret, up;
+ u32 core = 0;
+
+ if (argc < 2)
+ return CMD_RET_USAGE;
+
+ if (argc > 2)
+ core = simple_strtoul(argv[2], NULL, 10);
- up = arch_auxiliary_core_check_up(0);
+ up = arch_auxiliary_core_check_up(core);
if (!up) {
printf("## Auxiliary core is already down\n");
return CMD_RET_SUCCESS;
}
- ret = arch_auxiliary_core_down(0);
+ ret = arch_auxiliary_core_down(core);
if (ret)
return CMD_RET_FAILURE;
"<address> [<core>]\n"
" - start auxiliary core [<core>] (default 0),\n"
" at address <address>\n"
+ " <core>:\n"
+ " 0 - CM33\n"
+ " 1 - CM70\n"
+ " 7 - CM71\n"
+ " 8 - CM33 Sync\n"
+);
+
+static int do_prepaux(struct cmd_tbl *cmdtp, int flag, int argc,
+ char *const argv[])
+{
+ int ret;
+ u32 core = 0;
+
+ if (argc != 2)
+ return CMD_RET_USAGE;
+
+ core = simple_strtoul(argv[1], NULL, 10);
+
+ ret = arch_auxiliary_core_prepare(core);
+ if (ret)
+ return CMD_RET_FAILURE;
+
+ return CMD_RET_SUCCESS;
+}
+
+U_BOOT_CMD(
+ prepaux, CONFIG_SYS_MAXARGS, 1, do_prepaux,
+ "prepare auxiliary core",
+ "[<core>]\n"
+ " - prep auxiliary core [<core>] (default 0),\n"
+ " <core>:\n"
+ " 0 - CM33\n"
+ " 1 - CM70\n"
+ " 7 - CM71\n"
+ " 8 - CM33 Sync\n"
);
#if IS_ENABLED(CONFIG_AHAB_BOOT)
"<container_address> [<core>]\n"
" - start auxiliary core [<core>] (default 0),\n"
" with signed container image at address <address> in A core view\n"
+ " <core>:\n"
+ " 0 - CM33\n"
+ " 1 - CM70\n"
+ " 7 - CM71\n"
+ " 8 - CM33 Sync\n"
);
#else
U_BOOT_CMD(
"<address> [<core>]\n"
" - start auxiliary core [<core>] (default 0),\n"
" at address <address> of auxiliary core view\n"
+ " <core>:\n"
+ " 0 - CM33\n"
+ " 1 - CM70\n"
+ " 7 - CM71\n"
+ " 8 - CM33 Sync\n"
);
#endif
projects / thirdparty / u-boot.git / commitdiff
