Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 12b0d90c48aaabdd68bb789488be5ce31f1523fd..09da8627c035eb9e69e6657c0ac8c69813d0c55c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2025-07-20  Pan Li  <pan2.li@intel.com>
+
+       * config/riscv/autovec.md: Add (const_int 1) as the op2 of
+       ashiftrt.
+
 2025-07-19  Dimitar Dimitrov  <dimitar@dinux.eu>
 
        PR target/121124

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index eafd44957d2167c3e9936356df24ca29eb82eddd..b1af684c29057bc4e6ac034c3ca93f4641768f5c 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20250720
+20250721

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index affea652519142dac60fd029fdd302b5cd695841..1c313e05ca077dc13f05c475a3749122356c8ac3 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,27 @@
+2025-07-20  Andrew Pinski  <quic_apinski@quicinc.com>
+
+       PR testsuite/120859
+       * gcc.dg/tree-prof/afdo-crossmodule-1b.c: Add some dg-*
+       commands like what is in afdo-crossmodule-1.c
+
+2025-07-20  Pan Li  <pan2.li@intel.com>
+
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c:
+       Leverage DEF_AVG_0_WRAP to generate the correct func name.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i64-from-i128.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i32-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i16.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i32.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i64.c: Ditto.
+       * gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c: Ditto.
+
 2025-07-19  Dimitar Dimitrov  <dimitar@dinux.eu>
 
        PR target/121124

diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog
index b60a96f9bc3877c374fd6d191a0b4c96206d0e09..f297f6044da6f745d57b9e1e9209c871d890b79a 100644 (file)
--- a/libstdc++-v3/ChangeLog
+++ b/libstdc++-v3/ChangeLog
@@ -1,3 +1,9 @@
+2025-07-20  Jakub Jelinek  <jakub@redhat.com>
+
+       PR libstdc++/121174
+       * src/c++23/std.cc.in (std::dextents): Export.  Add to FIXME comments
+       other not yet implemented nor exported <mdspan> entities.
+
 2025-07-18  Jonathan Wakely  <jwakely@redhat.com>
 
        * include/bits/stl_iterator_base_types.h (__any_input_iterator):