memory: mtk-smi: Add support for Dimensity 1200 MT6893 SMI

Add the necessary platform data to enable support for the SMI
found on the MediaTek Dimensity 1200 (MT6893) SoC

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Yong Wu <yong.wu@mediatek.com>
Link: https://lore.kernel.org/r/20250410143958.475846-3-angelogioacchino.delregno@collabora.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

diff --git a/drivers/memory/mtk-smi.c b/drivers/memory/mtk-smi.c
index a8f5467d6b31e31ccbf54aa1f46eb35771bb8658..c086c22511f7f6c1ebcf1d48d28c73e725098694 100644 (file)
--- a/drivers/memory/mtk-smi.c
+++ b/drivers/memory/mtk-smi.c
@@ -283,6 +283,43 @@ static int mtk_smi_larb_config_port_gen2_general(struct device *dev)
        return 0;
 }
 
+static const u8 mtk_smi_larb_mt6893_ostd[][SMI_LARB_PORT_NR_MAX] = {
+       [0] = {0x2, 0x6, 0x2, 0x2, 0x2, 0x28, 0x18, 0x18, 0x1, 0x1, 0x1, 0x8,
+              0x8, 0x1, 0x3f},
+       [1] = {0x2, 0x6, 0x2, 0x2, 0x2, 0x28, 0x18, 0x18, 0x1, 0x1, 0x1, 0x8,
+              0x8, 0x1, 0x3f},
+       [2] = {0x5, 0x5, 0x5, 0x5, 0x1, 0x3f},
+       [3] = {0x5, 0x5, 0x5, 0x5, 0x1, 0x3f},
+       [4] = {0x28, 0x19, 0xb, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x4, 0x1},
+       [5] = {0x1, 0x1, 0x4, 0x1, 0x1, 0x1, 0x1, 0x16},
+       [6] = {},
+       [7] = {0x1, 0x4, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x4, 0x4, 0x1,
+              0x4, 0x1, 0xa, 0x6, 0x1, 0xa, 0x6, 0x1, 0x1, 0x1, 0x1, 0x5,
+              0x3, 0x3, 0x4},
+       [8] = {0x1, 0x4, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x4, 0x4, 0x1,
+              0x4, 0x1, 0xa, 0x6, 0x1, 0xa, 0x6, 0x1, 0x1, 0x1, 0x1, 0x5,
+              0x3, 0x3, 0x4},
+       [9] = {0x9, 0x7, 0xf, 0x8, 0x1, 0x8, 0x9, 0x3, 0x3, 0x6, 0x7, 0x4,
+              0x9, 0x3, 0x4, 0xe, 0x1, 0x7, 0x8, 0x7, 0x7, 0x1, 0x6, 0x2,
+              0xf, 0x8, 0x1, 0x1, 0x1},
+       [10] = {},
+       [11] = {0x9, 0x7, 0xf, 0x8, 0x1, 0x8, 0x9, 0x3, 0x3, 0x6, 0x7, 0x4,
+               0x9, 0x3, 0x4, 0xe, 0x1, 0x7, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1,
+               0x1, 0x1, 0x1, 0x1, 0x1},
+       [12] = {},
+       [13] = {0x2, 0xc, 0xc, 0xe, 0x6, 0x6, 0x6, 0x6, 0x6, 0x12, 0x6, 0x1},
+       [14] = {0x2, 0xc, 0xc, 0x28, 0x12, 0x6},
+       [15] = {0x28, 0x1, 0x2, 0x28, 0x1},
+       [16] = {0x28, 0x14, 0x2, 0xc, 0x18, 0x2, 0x14, 0x14, 0x4, 0x4, 0x4, 0x2,
+               0x4, 0x2, 0x8, 0x4, 0x4},
+       [17] = {0x28, 0x14, 0x2, 0xc, 0x18, 0x2, 0x14, 0x14, 0x4, 0x4, 0x4, 0x2,
+               0x4, 0x2, 0x8, 0x4, 0x4},
+       [18] = {0x28, 0x14, 0x2, 0xc, 0x18, 0x2, 0x14, 0x14, 0x4, 0x4, 0x4, 0x2,
+               0x4, 0x2, 0x8, 0x4, 0x4},
+       [19] = {0x2, 0x2, 0x4, 0x2},
+       [20] = {0x9, 0x9, 0x5, 0x5, 0x1, 0x1},
+};
+
 static const u8 mtk_smi_larb_mt8188_ostd[][SMI_LARB_PORT_NR_MAX] = {
        [0] = {0x02, 0x18, 0x22, 0x22, 0x01, 0x02, 0x0a,},
        [1] = {0x12, 0x02, 0x14, 0x14, 0x01, 0x18, 0x0a,},
@@ -429,6 +466,12 @@ static const struct mtk_smi_larb_gen mtk_smi_larb_mt6779 = {
                /* DUMMY | IPU0 | IPU1 | CCU | MDLA */
 };
 
+static const struct mtk_smi_larb_gen mtk_smi_larb_mt6893 = {
+       .config_port                = mtk_smi_larb_config_port_gen2_general,
+       .flags_general              = MTK_SMI_FLAG_THRT_UPDATE | MTK_SMI_FLAG_SW_FLAG,
+       .ostd                       = mtk_smi_larb_mt6893_ostd,
+};
+
 static const struct mtk_smi_larb_gen mtk_smi_larb_mt8167 = {
        /* mt8167 do not need the port in larb */
        .config_port = mtk_smi_larb_config_port_mt8167,
@@ -474,6 +517,7 @@ static const struct of_device_id mtk_smi_larb_of_ids[] = {
        {.compatible = "mediatek,mt2712-smi-larb", .data = &mtk_smi_larb_mt2712},
        {.compatible = "mediatek,mt6779-smi-larb", .data = &mtk_smi_larb_mt6779},
        {.compatible = "mediatek,mt6795-smi-larb", .data = &mtk_smi_larb_mt8173},
+       {.compatible = "mediatek,mt6893-smi-larb", .data = &mtk_smi_larb_mt6893},
        {.compatible = "mediatek,mt8167-smi-larb", .data = &mtk_smi_larb_mt8167},
        {.compatible = "mediatek,mt8173-smi-larb", .data = &mtk_smi_larb_mt8173},
        {.compatible = "mediatek,mt8183-smi-larb", .data = &mtk_smi_larb_mt8183},
@@ -694,6 +738,13 @@ static const struct mtk_smi_common_plat mtk_smi_common_mt6795 = {
        .init     = mtk_smi_common_mt6795_init,
 };
 
+static const struct mtk_smi_common_plat mtk_smi_common_mt6893 = {
+       .type     = MTK_SMI_GEN2,
+       .has_gals = true,
+       .bus_sel  = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(4) |
+                   F_MMU1_LARB(5) | F_MMU1_LARB(7),
+};
+
 static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = {
        .type     = MTK_SMI_GEN2,
        .has_gals = true,
@@ -756,6 +807,7 @@ static const struct of_device_id mtk_smi_common_of_ids[] = {
        {.compatible = "mediatek,mt2712-smi-common", .data = &mtk_smi_common_gen2},
        {.compatible = "mediatek,mt6779-smi-common", .data = &mtk_smi_common_mt6779},
        {.compatible = "mediatek,mt6795-smi-common", .data = &mtk_smi_common_mt6795},
+       {.compatible = "mediatek,mt6893-smi-common", .data = &mtk_smi_common_mt6893},
        {.compatible = "mediatek,mt8167-smi-common", .data = &mtk_smi_common_gen2},
        {.compatible = "mediatek,mt8173-smi-common", .data = &mtk_smi_common_gen2},
        {.compatible = "mediatek,mt8183-smi-common", .data = &mtk_smi_common_mt8183},