(__mmask8) __U,
__R);
}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmadd_round_pch (__m256h __A, __m256h __B, __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddcph256_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmadd_round_pch (__m256h __A, __mmask16 __U, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddcph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fmadd_round_pch (__m256h __A, __m256h __B, __m256h __D,
- __mmask16 __U, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddcph256_mask3_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fmadd_round_pch (__mmask16 __U, __m256h __A, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddcph256_maskz_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmaddsub_round_pd (__m256d __A, __m256d __B, __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmaddsubpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmaddsub_round_pd (__m256d __A, __mmask8 __U, __m256d __B,
- __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmaddsubpd256_mask_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fmaddsub_round_pd (__m256d __A, __m256d __B, __m256d __D,
- __mmask8 __U, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmaddsubpd256_mask3_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256d
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fmaddsub_round_pd (__mmask8 __U, __m256d __A, __m256d __B,
- __m256d __D, const int __R)
-{
- return (__m256d) __builtin_ia32_vfmaddsubpd256_maskz_round ((__v4df) __A,
- (__v4df) __B,
- (__v4df) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmaddsub_round_ph (__m256h __A, __m256h __B, __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddsubph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) -1,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmaddsub_round_ph (__m256h __A, __mmask16 __U, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddsubph256_mask_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fmaddsub_round_ph (__m256h __A, __m256h __B, __m256h __D,
- __mmask16 __U, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddsubph256_mask3_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256h
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fmaddsub_round_ph (__mmask16 __U, __m256h __A, __m256h __B,
- __m256h __D, const int __R)
-{
- return (__m256h) __builtin_ia32_vfmaddsubph256_maskz_round ((__v16hf) __A,
- (__v16hf) __B,
- (__v16hf) __D,
- (__mmask16) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_fmaddsub_round_ps (__m256 __A, __m256 __B, __m256 __D, const int __R)
-{
- return (__m256) __builtin_ia32_vfmaddsubps256_mask_round ((__v8sf) __A,
- (__v8sf) __B,
- (__v8sf) __D,
- (__mmask8) -1,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask_fmaddsub_round_ps (__m256 __A, __mmask8 __U, __m256 __B,
- __m256 __D, const int __R)
-{
- return (__m256) __builtin_ia32_vfmaddsubps256_mask_round ((__v8sf) __A,
- (__v8sf) __B,
- (__v8sf) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_mask3_fmaddsub_round_ps (__m256 __A, __m256 __B, __m256 __D,
- __mmask8 __U, const int __R)
-{
- return (__m256) __builtin_ia32_vfmaddsubps256_mask3_round ((__v8sf) __A,
- (__v8sf) __B,
- (__v8sf) __D,
- (__mmask8) __U,
- __R);
-}
-
-extern __inline __m256
-__attribute__ ((__gnu_inline__, __always_inline__, __artificial__))
-_mm256_maskz_fmaddsub_round_ps (__mmask8 __U, __m256 __A, __m256 __B,
- __m256 __D, const int __R)
-{
- return (__m256) __builtin_ia32_vfmaddsubps256_maskz_round ((__v8sf) __A,
- (__v8sf) __B,
- (__v8sf) __D,
- (__mmask8) __U,
- __R);
-}
#else
#define _mm256_add_round_pd(A, B, R) \
((__m256d) __builtin_ia32_addpd256_mask_round ((__v4df) (A), \
#define _mm256_maskz_fmadd_round_ps(U, A, B, D, R) \
((__m256)__builtin_ia32_vfmaddps256_maskz_round (A, B, D, U, R))
-
-#define _mm256_fmadd_round_pch(A, B, D, R) \
- (__m256h) __builtin_ia32_vfmaddcph256_round ((A), (B), (D), (R))
-
-#define _mm256_mask_fmadd_round_pch(A, U, B, D, R) \
- ((__m256h) __builtin_ia32_vfmaddcph256_mask_round ((__v16hf) (A), \
- (__v16hf) (B), \
- (__v16hf) (D), \
- (U), (R)))
-
-#define _mm256_mask3_fmadd_round_pch(A, B, D, U, R) \
- (__m256h) __builtin_ia32_vfmaddcph256_mask3_round ((A), (B), (D), (U), (R))
-
-#define _mm256_maskz_fmadd_round_pch(U, A, B, D, R) \
- (__m256h) __builtin_ia32_vfmaddcph256_maskz_round ((A), (B), (D), (U), (R))
-
-#define _mm256_fmaddsub_round_pd(A, B, D, R) \
- (__m256d) __builtin_ia32_vfmaddsubpd256_mask_round (A, B, D, -1, R)
-
-#define _mm256_mask_fmaddsub_round_pd(A, U, B, D, R) \
- (__m256d) __builtin_ia32_vfmaddsubpd256_mask_round (A, B, D, U, R)
-
-#define _mm256_mask3_fmaddsub_round_pd(A, B, D, U, R) \
- (__m256d)__builtin_ia32_vfmaddsubpd256_mask3_round (A, B, D, U, R)
-
-#define _mm256_maskz_fmaddsub_round_pd(U, A, B, D, R) \
- (__m256d)__builtin_ia32_vfmaddsubpd256_maskz_round (A, B, D, U, R)
-
-#define _mm256_fmaddsub_round_ph(A, B, D, R) \
- ((__m256h)__builtin_ia32_vfmaddsubph256_mask_round ((A), (B), (D), -1, (R)))
-
-#define _mm256_mask_fmaddsub_round_ph(A, U, B, D, R) \
- ((__m256h)__builtin_ia32_vfmaddsubph256_mask_round ((A), (B), (D), (U), (R)))
-
-#define _mm256_mask3_fmaddsub_round_ph(A, B, D, U, R) \
- ((__m256h)__builtin_ia32_vfmaddsubph256_mask3_round ((A), (B), (D), (U), (R)))
-
-#define _mm256_maskz_fmaddsub_round_ph(U, A, B, D, R) \
- ((__m256h)__builtin_ia32_vfmaddsubph256_maskz_round ((A), (B), (D), (U), (R)))
-
-#define _mm256_fmaddsub_round_ps(A, B, D, R) \
- (__m256)__builtin_ia32_vfmaddsubps256_mask_round (A, B, D, -1, R)
-
-#define _mm256_mask_fmaddsub_round_ps(A, U, B, D, R) \
- (__m256)__builtin_ia32_vfmaddsubps256_mask_round (A, B, D, U, R)
-
-#define _mm256_mask3_fmaddsub_round_ps(A, B, D, U, R) \
- (__m256)__builtin_ia32_vfmaddsubps256_mask3_round (A, B, D, U, R)
-
-#define _mm256_maskz_fmaddsub_round_ps(U, A, B, D, R) \
- (__m256)__builtin_ia32_vfmaddsubps256_maskz_round (A, B, D, U, R)
#endif
#define _mm256_cmul_round_pch(A, B, R) _mm256_fcmul_round_pch ((A), (B), (R))
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmadd_v8sf_mask_round, "__builtin_ia32_vfmaddps256_mask_round", IX86_BUILTIN_VFMADDPS256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmadd_v8sf_mask3_round, "__builtin_ia32_vfmaddps256_mask3_round", IX86_BUILTIN_VFMADDPS512_MASK3_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmadd_v8sf_maskz_round, "__builtin_ia32_vfmaddps256_maskz_round", IX86_BUILTIN_VFMADDPS256_MASKZ_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_fma_fmaddc_v16hf_round, "__builtin_ia32_vfmaddcph256_round", IX86_BUILTIN_VFMADDCPH256_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddc_v16hf_mask1_round, "__builtin_ia32_vfmaddcph256_mask_round", IX86_BUILTIN_VFMADDCPH256_MASK_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddc_v16hf_mask_round, "__builtin_ia32_vfmaddcph256_mask3_round", IX86_BUILTIN_VFMADDCPH256_MASK3_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddc_v16hf_maskz_round, "__builtin_ia32_vfmaddcph256_maskz_round", IX86_BUILTIN_VFMADDCPH256_MASKZ_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddsub_v4df_mask_round, "__builtin_ia32_vfmaddsubpd256_mask_round", IX86_BUILTIN_VFMADDSUBPD256_MASK_ROUND, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddsub_v4df_mask3_round, "__builtin_ia32_vfmaddsubpd256_mask3_round", IX86_BUILTIN_VFMADDSUBPD256_MASK3_ROUND, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddsub_v4df_maskz_round, "__builtin_ia32_vfmaddsubpd256_maskz_round", IX86_BUILTIN_VFMADDSUBPD256_MASKZ_ROUND, UNKNOWN, (int) V4DF_FTYPE_V4DF_V4DF_V4DF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddsub_v16hf_mask_round, "__builtin_ia32_vfmaddsubph256_mask_round", IX86_BUILTIN_VFMADDSUBPH256_MASK_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddsub_v16hf_mask3_round, "__builtin_ia32_vfmaddsubph256_mask3_round", IX86_BUILTIN_VFMADDSUBPH256_MASK3_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddsub_v16hf_maskz_round, "__builtin_ia32_vfmaddsubph256_maskz_round", IX86_BUILTIN_VFMADDSUBPH256_MASKZ_ROUND, UNKNOWN, (int) V16HF_FTYPE_V16HF_V16HF_V16HF_UHI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddsub_v8sf_mask_round, "__builtin_ia32_vfmaddsubps256_mask_round", IX86_BUILTIN_VFMADDSUBPS256_MASK_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddsub_v8sf_mask3_round, "__builtin_ia32_vfmaddsubps256_mask3_round", IX86_BUILTIN_VFMADDSUBPS512_MASK3_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
-BDESC (0, OPTION_MASK_ISA2_AVX10_2_256, CODE_FOR_avx512vl_fmaddsub_v8sf_maskz_round, "__builtin_ia32_vfmaddsubps256_maskz_round", IX86_BUILTIN_VFMADDSUBPS256_MASKZ_ROUND, UNKNOWN, (int) V8SF_FTYPE_V8SF_V8SF_V8SF_UQI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_cvt2ps2phx_v32hf_mask_round, "__builtin_ia32_vcvt2ps2phx512_mask_round", IX86_BUILTIN_VCVT2PS2PHX_V32HF_MASK_ROUND, UNKNOWN, (int) V32HF_FTYPE_V16SF_V16SF_V32HF_USI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_cvtph2ibsv32hf_mask_round, "__builtin_ia32_cvtph2ibs512_mask_round", IX86_BUILTIN_CVTPH2IBS512_MASK_ROUND, UNKNOWN, (int) V32HI_FTYPE_V32HF_V32HI_USI_INT)
BDESC (0, OPTION_MASK_ISA2_AVX10_2_512, CODE_FOR_avx10_2_cvtph2iubsv32hf_mask_round, "__builtin_ia32_cvtph2iubs512_mask_round", IX86_BUILTIN_CVTPH2IUBS512_MASK_ROUND, UNKNOWN, (int) V32HI_FTYPE_V32HF_V32HI_USI_INT)
UNSPEC_FMADDSUB)
(match_dup 1)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk,Yk")))]
- "TARGET_AVX512F && <round_mode_condition>"
+ "TARGET_AVX512F"
"@
vfmaddsub132<ssemodesuffix>\t{<round_op5>%2, %3, %0%{%4%}|%0%{%4%}, %3, %2<round_op5>}
vfmaddsub213<ssemodesuffix>\t{<round_op5>%3, %2, %0%{%4%}|%0%{%4%}, %2, %3<round_op5>}"
UNSPEC_FMADDSUB)
(match_dup 3)
(match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
- "TARGET_AVX512F && <round_mode_condition>"
+ "TARGET_AVX512F"
"vfmaddsub231<ssemodesuffix>\t{<round_op5>%2, %1, %0%{%4%}|%0%{%4%}, %1, %2<round_op5>}"
[(set_attr "type" "ssemuladd")
(set_attr "prefix" "evex")
#define __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, 8)
#define __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddcph256_round(A, B, C, D) __builtin_ia32_vfmaddcph256_round(A, B, C, 8)
-#define __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, 8)
-#define __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, 8)
-#define __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, 8)
-#define __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vfmadd231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
/* { dg-final { scan-assembler-times "vfmadd...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddcph\[ \\t\]+\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 2 } } */
-/* { dg-final { scan-assembler-times "vfmaddcph\[ \\t\]+\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\{%k\[0-9\]\}\{z\}\[^\n\r]*(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub231pd\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub...pd\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub231ph\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub...ph\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rd-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub231ps\[ \\t\]+\[^\n\]*\{ru-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */
-/* { dg-final { scan-assembler-times "vfmaddsub...ps\[ \\t\]+\[^\n\]*\{rz-sae\}\[^\{\n\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */
#include <immintrin.h>
x = _mm256_mask3_fmadd_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
x = _mm256_maskz_fmadd_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
}
-
-void extern
-avx10_2_test_8 (void)
-{
- xh = _mm256_fmadd_round_pch (xh, xh, xh, 8);
- xh = _mm256_mask_fmadd_round_pch (xh, m8, xh, xh, 8);
- xh = _mm256_mask3_fmadd_round_pch (xh, xh, xh, m8, 8);
- xh = _mm256_maskz_fmadd_round_pch (m8, xh, xh, xh, 11);
-}
-
-void extern
-avx10_2_test_9 (void)
-{
- xd = _mm256_fmaddsub_round_pd (xd, xd, xd, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
- xd = _mm256_mask_fmaddsub_round_pd (xd, m8, xd, xd, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
- xd = _mm256_mask3_fmaddsub_round_pd (xd, xd, xd, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
- xd = _mm256_maskz_fmaddsub_round_pd (m8, xd, xd, xd, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
-
- xh = _mm256_fmaddsub_round_ph (xh, xh, xh, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
- xh = _mm256_mask_fmaddsub_round_ph (xh, m8, xh, xh, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
- xh = _mm256_mask3_fmaddsub_round_ph (xh, xh, xh, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
- xh = _mm256_maskz_fmaddsub_round_ph (m8, xh, xh, xh, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
-
- x = _mm256_fmaddsub_round_ps (x, x, x, _MM_FROUND_TO_NEAREST_INT | _MM_FROUND_NO_EXC);
- x = _mm256_mask_fmaddsub_round_ps (x, m8, x, x, _MM_FROUND_TO_NEG_INF | _MM_FROUND_NO_EXC);
- x = _mm256_mask3_fmaddsub_round_ps (x, x, x, m8, _MM_FROUND_TO_POS_INF | _MM_FROUND_NO_EXC);
- x = _mm256_maskz_fmaddsub_round_ps (m8, x, x, x, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC);
-}
#define __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, 8)
#define __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddcph256_round(A, B, C, D) __builtin_ia32_vfmaddcph256_round(A, B, C, 8)
-#define __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, 8)
-#define __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, 8)
-#define __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, 8)
-#define __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
test_3 (_mm256_fmadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9)
test_3 (_mm256_fmadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9)
test_3 (_mm256_fmadd_round_ps, __m256, __m256, __m256, __m256, 9)
-test_3 (_mm256_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8)
-test_3 (_mm256_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9)
-test_3 (_mm256_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9)
-test_3 (_mm256_fmaddsub_round_ps, __m256, __m256, __m256, __m256, 9)
test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8)
test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8)
test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8)
test_4 (_mm256_mask_fmadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
test_4 (_mm256_mask3_fmadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9)
test_4 (_mm256_maskz_fmadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9)
-test_4 (_mm256_mask_fmadd_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8)
-test_4 (_mm256_mask3_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, __mmask8, 8)
-test_4 (_mm256_maskz_fmadd_round_pch, __m256h, __mmask8, __m256h, __m256h, __m256h, 8)
-test_4 (_mm256_mask_fmaddsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9)
-test_4 (_mm256_mask3_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9)
-test_4 (_mm256_maskz_fmaddsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9)
-test_4 (_mm256_mask_fmaddsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9)
-test_4 (_mm256_mask3_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9)
-test_4 (_mm256_maskz_fmaddsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9)
-test_4 (_mm256_mask_fmaddsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
-test_4 (_mm256_mask3_fmaddsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9)
-test_4 (_mm256_maskz_fmaddsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9)
test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d, __m256i, 3, 8)
test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256, __m256i, 3, 8)
test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256i, 3, 8)
test_3 (_mm256_fmadd_round_pd, __m256d, __m256d, __m256d, __m256d, 9)
test_3 (_mm256_fmadd_round_ph, __m256h, __m256h, __m256h, __m256h, 9)
test_3 (_mm256_fmadd_round_ps, __m256, __m256, __m256, __m256, 9)
-test_3 (_mm256_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, 8)
-test_3 (_mm256_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, 9)
-test_3 (_mm256_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, 9)
test_3x (_mm256_mask_cmp_round_pd_mask, __mmask8, __mmask8, __m256d, __m256d, 1, 8)
test_3x (_mm256_mask_cmp_round_ph_mask, __mmask16, __mmask16, __m256h, __m256h, 1, 8)
test_3x (_mm256_mask_cmp_round_ps_mask, __mmask8, __mmask8, __m256, __m256, 1, 8)
test_4 (_mm256_mask_fmadd_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
test_4 (_mm256_mask3_fmadd_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9)
test_4 (_mm256_maskz_fmadd_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9)
-test_4 (_mm256_mask_fmadd_round_pch, __m256h, __m256h, __mmask8, __m256h, __m256h, 8)
-test_4 (_mm256_mask3_fmadd_round_pch, __m256h, __m256h, __m256h, __m256h, __mmask8, 8)
-test_4 (_mm256_maskz_fmadd_round_pch, __m256h, __mmask8, __m256h, __m256h, __m256h, 8)
-test_4 (_mm256_mask_fmaddsub_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256d, 9)
-test_4 (_mm256_mask3_fmaddsub_round_pd, __m256d, __m256d, __m256d, __m256d, __mmask8, 9)
-test_4 (_mm256_maskz_fmaddsub_round_pd, __m256d,__mmask8, __m256d, __m256d, __m256d, 9)
-test_4 (_mm256_mask_fmaddsub_round_ph, __m256h, __m256h, __mmask16, __m256h, __m256h, 9)
-test_4 (_mm256_mask3_fmaddsub_round_ph, __m256h, __m256h, __m256h, __m256h, __mmask16, 9)
-test_4 (_mm256_maskz_fmaddsub_round_ph, __m256h,__mmask16, __m256h, __m256h, __m256h, 9)
-test_4 (_mm256_mask_fmaddsub_round_ps, __m256, __m256, __mmask8, __m256, __m256, 9)
-test_4 (_mm256_mask3_fmaddsub_round_ps, __m256, __m256, __m256, __m256, __mmask8, 9)
-test_4 (_mm256_maskz_fmaddsub_round_ps, __m256,__mmask8, __m256, __m256, __m256, 9)
test_4x (_mm256_maskz_fixupimm_round_pd, __m256d, __mmask8, __m256d, __m256d, __m256i, 3, 8)
test_4x (_mm256_maskz_fixupimm_round_ps, __m256, __mmask8, __m256, __m256, __m256i, 3, 8)
test_4x (_mm256_mask_fixupimm_round_pd, __m256d, __m256d, __mmask8, __m256d, __m256i, 3, 8)
#define __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask_round(A, B, C, D, 8)
#define __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_mask3_round(A, B, C, D, 8)
#define __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddps256_maskz_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddcph256_round(A, B, C, D) __builtin_ia32_vfmaddcph256_round(A, B, C, 8)
-#define __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask_round(A, C, D, B, 8)
-#define __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, E) __builtin_ia32_vfmaddcph256_mask3_round(A, C, D, B, 8)
-#define __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, E) __builtin_ia32_vfmaddcph256_maskz_round(B, C, D, A, 8)
-#define __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_mask3_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubpd256_maskz_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_mask3_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubph256_maskz_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_mask3_round(A, B, C, D, 8)
-#define __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, E) __builtin_ia32_vfmaddsubps256_maskz_round(A, B, C, D, 8)
/* avx10_2-512mediaintrin.h */
#define __builtin_ia32_mpsadbw512(A, B, C) __builtin_ia32_mpsadbw512 (A, B, 1)
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