drm/amd/display: Fix dmub_cmd header alignment

[ Upstream commit 327aba7f558187e451636c77a1662a2858438dc9 ]

[why & how]
Header misalignment in struct dmub_cmd_replay_copy_settings_data and
struct dmub_alpm_auxless_data causes incorrect data read between driver
and dmub.
Fix the misalignment and ensure that everything is aligned to 4-byte
boundaries.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Ovidiu Bunea <ovidiu.bunea@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
index 6a69a788abe801d49a6fbd66f793aca734ee45f3..6fa25b0375858c16e6dae78ef4a4377f68184fed 100644 (file)
--- a/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
+++ b/drivers/gpu/drm/amd/display/dmub/inc/dmub_cmd.h
@@ -4015,6 +4015,10 @@ struct dmub_alpm_auxless_data {
        uint16_t lfps_t1_t2_override_us;
        short lfps_t1_t2_offset_us;
        uint8_t lttpr_count;
+       /*
+        * Padding to align structure to 4 byte boundary.
+        */
+       uint8_t pad[1];
 };
 
 /**
@@ -4092,6 +4096,14 @@ struct dmub_cmd_replay_copy_settings_data {
         */
        struct dmub_alpm_auxless_data auxless_alpm_data;
 
+       /**
+        * @hpo_stream_enc_inst: HPO stream encoder instance
+        */
+       uint8_t hpo_stream_enc_inst;
+       /**
+        * @hpo_link_enc_inst: HPO link encoder instance
+        */
+       uint8_t hpo_link_enc_inst;
        /**
         * @pad: Align structure to 4 byte boundary.
         */