--- /dev/null
+// SPDX-License-Identifier: GPL-2.0
+
+/ {
+ emc_icc_dvfs_opp_table: opp-table-emc {
+ compatible = "operating-points-v2";
+
+ opp-12750000-900 {
+ opp-microvolt = <900000 900000 1390000>;
+ opp-hz = /bits/ 64 <12750000>;
+ opp-supported-hw = <0x000F>;
+ };
+
+ opp-20400000-900 {
+ opp-microvolt = <900000 900000 1390000>;
+ opp-hz = /bits/ 64 <20400000>;
+ opp-supported-hw = <0x000F>;
+ };
+
+ opp-40800000-900 {
+ opp-microvolt = <900000 900000 1390000>;
+ opp-hz = /bits/ 64 <40800000>;
+ opp-supported-hw = <0x000F>;
+ };
+
+ opp-68000000-900 {
+ opp-microvolt = <900000 900000 1390000>;
+ opp-hz = /bits/ 64 <68000000>;
+ opp-supported-hw = <0x000F>;
+ };
+
+ opp-102000000-900 {
+ opp-microvolt = <900000 900000 1390000>;
+ opp-hz = /bits/ 64 <102000000>;
+ opp-supported-hw = <0x000F>;
+ };
+
+ opp-204000000-900 {
+ opp-microvolt = <900000 900000 1390000>;
+ opp-hz = /bits/ 64 <204000000>;
+ opp-supported-hw = <0x000F>;
+ opp-suspend;
+ };
+
+ opp-312000000-1000 {
+ opp-microvolt = <1000000 1000000 1390000>;
+ opp-hz = /bits/ 64 <312000000>;
+ opp-supported-hw = <0x000F>;
+ };
+
+ opp-408000000-1000 {
+ opp-microvolt = <1000000 1000000 1390000>;
+ opp-hz = /bits/ 64 <408000000>;
+ opp-supported-hw = <0x000F>;
+ };
+
+ /*
+ * T40X can work with 1050mV for 528MHz but T40T which is
+ * in the same group as T40X requires 1100mV. If there will
+ * be enough data that T40T can work reliably with 1050mV
+ * for 528MHz then voltage for 528MHz opp can be lowered.
+ * T40S should remain with 1100mV for 528MHz opp.
+ */
+ opp-528000000-1100 {
+ opp-microvolt = <1100000 1100000 1390000>;
+ opp-hz = /bits/ 64 <528000000>;
+ opp-supported-hw = <0x000F>;
+ };
+
+ opp-624000000-1100 {
+ opp-microvolt = <1100000 1100000 1390000>;
+ opp-hz = /bits/ 64 <624000000>;
+ opp-supported-hw = <0x000F>;
+ };
+
+ opp-792000000-1100 {
+ opp-microvolt = <1100000 1100000 1390000>;
+ opp-hz = /bits/ 64 <792000000>;
+ opp-supported-hw = <0x000F>;
+ };
+
+ opp-900000000-1200 {
+ opp-microvolt = <1200000 1200000 1390000>;
+ opp-hz = /bits/ 64 <900000000>;
+ opp-supported-hw = <0x000E>;
+ };
+ };
+
+ emc_bw_dfs_opp_table: opp-table-actmon {
+ compatible = "operating-points-v2";
+
+ opp-12750000 {
+ opp-hz = /bits/ 64 <12750000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <204000>;
+ };
+
+ opp-20400000 {
+ opp-hz = /bits/ 64 <20400000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <326400>;
+ };
+
+ opp-40800000 {
+ opp-hz = /bits/ 64 <40800000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <652800>;
+ };
+
+ opp-68000000 {
+ opp-hz = /bits/ 64 <68000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <1088000>;
+ };
+
+ opp-102000000 {
+ opp-hz = /bits/ 64 <102000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <1632000>;
+ };
+
+ opp-204000000 {
+ opp-hz = /bits/ 64 <204000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <3264000>;
+ opp-suspend;
+ };
+
+ opp-312000000 {
+ opp-hz = /bits/ 64 <312000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <4992000>;
+ };
+
+ opp-408000000 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <6528000>;
+ };
+
+ opp-528000000 {
+ opp-hz = /bits/ 64 <528000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <8448000>;
+ };
+
+ opp-624000000 {
+ opp-hz = /bits/ 64 <624000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <9984000>;
+ };
+
+ opp-792000000 {
+ opp-hz = /bits/ 64 <792000000>;
+ opp-supported-hw = <0x000F>;
+ opp-peak-kBps = <12672000>;
+ };
+
+ opp-900000000 {
+ opp-hz = /bits/ 64 <900000000>;
+ opp-supported-hw = <0x000E>;
+ opp-peak-kBps = <14400000>;
+ };
+ };
+};
#include <dt-bindings/soc/tegra-pmc.h>
#include <dt-bindings/thermal/tegra114-soctherm.h>
+#include "tegra114-peripherals-opp.dtsi"
+
/ {
compatible = "nvidia,tegra114";
interrupt-parent = <&lic>;
clock-names = "actmon", "emc";
resets = <&tegra_car TEGRA114_CLK_ACTMON>;
reset-names = "actmon";
+ operating-points-v2 = <&emc_bw_dfs_opp_table>;
+ interconnects = <&mc TEGRA114_MC_MPCORER &emc>;
+ interconnect-names = "cpu-read";
#cooling-cells = <2>;
};
#reset-cells = <1>;
#iommu-cells = <1>;
+ #interconnect-cells = <1>;
};
emc: external-memory-controller@7001b000 {
clock-names = "emc";
nvidia,memory-controller = <&mc>;
+ operating-points-v2 = <&emc_icc_dvfs_opp_table>;
+
+ #interconnect-cells = <0>;
};
hda@70030000 {