]> git.ipfire.org Git - thirdparty/u-boot.git/commitdiff
sunxi: add support for Liontron H-A133L board
authorAndre Przywara <andre.przywara@arm.com>
Sat, 10 May 2025 23:33:02 +0000 (00:33 +0100)
committerAndre Przywara <andre.przywara@arm.com>
Tue, 24 Jun 2025 12:44:48 +0000 (13:44 +0100)
The Liontron H-A133L is an industrial development board based on the
Allwinner A133 SoC. It uses LPDDR4 DRAM, eMMC, and an AXP707 PMIC.

Add a defconfig with the required DRAM settings.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
board/sunxi/MAINTAINERS
configs/liontron-h-a133l_defconfig [new file with mode: 0644]

index 84799879e858fcf8033f70240c6652d35962848e..46094edb3d3259ddfb9bf0c5e6a786e3606324dc 100644 (file)
@@ -296,6 +296,11 @@ M: Adam Sampson <ats@offog.org>
 S:     Maintained
 F:     configs/Linksprite_pcDuino3_Nano_defconfig
 
+LIONTRON H-A133L BOARD
+M:     Andre Przywara <andre.przywara@arm.com>
+S:     Maintained
+F:     configs/liontron-h-a133l_defconfig
+
 MARSBOARD-A10 BOARD
 M:     Aleksei Mamlin <mamlinav@gmail.com>
 S:     Maintained
diff --git a/configs/liontron-h-a133l_defconfig b/configs/liontron-h-a133l_defconfig
new file mode 100644 (file)
index 0000000..4b76976
--- /dev/null
@@ -0,0 +1,37 @@
+CONFIG_ARM=y
+CONFIG_ARCH_SUNXI=y
+CONFIG_DEFAULT_DEVICE_TREE="allwinner/sun50i-a133-liontron-h-a133l"
+CONFIG_SPL=y
+CONFIG_DRAM_SUNXI_DX_ODT=0x7070707
+CONFIG_DRAM_SUNXI_DX_DRI=0xd0d0d0d
+CONFIG_DRAM_SUNXI_CA_DRI=0xe0e
+CONFIG_DRAM_SUNXI_PARA0=0xd0a050c
+CONFIG_DRAM_SUNXI_MR11=0x4
+CONFIG_DRAM_SUNXI_MR12=0x72
+CONFIG_DRAM_SUNXI_MR13=0x0
+CONFIG_DRAM_SUNXI_MR14=0x7
+CONFIG_DRAM_SUNXI_TPR1=0x26
+CONFIG_DRAM_SUNXI_TPR2=0x6060606
+CONFIG_DRAM_SUNXI_TPR3=0x84040404
+CONFIG_DRAM_SUNXI_TPR6=0x48000000
+CONFIG_DRAM_SUNXI_TPR10=0x273333
+CONFIG_DRAM_SUNXI_TPR11=0x231d151c
+CONFIG_DRAM_SUNXI_TPR12=0x1212110e
+CONFIG_DRAM_SUNXI_TPR13=0x7521
+CONFIG_DRAM_SUNXI_TPR14=0x2023211f
+CONFIG_MACH_SUN50I_A133=y
+CONFIG_DRAM_CLK=792
+CONFIG_MMC_SUNXI_SLOT_EXTRA=2
+CONFIG_SUNXI_DRAM_A133_LPDDR4=y
+CONFIG_R_I2C_ENABLE=y
+# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
+CONFIG_SPL_I2C=y
+CONFIG_SPL_SYS_I2C_LEGACY=y
+CONFIG_SYS_I2C_MVTWSI=y
+CONFIG_SYS_I2C_SLAVE=0x7f
+CONFIG_SYS_I2C_SPEED=400000
+CONFIG_AXP803_POWER=y
+CONFIG_AXP_DCDC5_VOLT=1100
+CONFIG_SUPPORT_EMMC_BOOT=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y