]> git.ipfire.org Git - thirdparty/gcc.git/commitdiff
aarch64: Fix ICE due to aarch64_gen_compare_reg_maybe_ze [PR94435]
authorJakub Jelinek <jakub@redhat.com>
Thu, 2 Apr 2020 10:54:47 +0000 (12:54 +0200)
committerJakub Jelinek <jakub@redhat.com>
Thu, 2 Apr 2020 10:59:11 +0000 (12:59 +0200)
The following testcase ICEs, because aarch64_gen_compare_reg_maybe_ze emits
invalid RTL.
For y_mode [QH]Imode it expects y to be of that mode (or CONST_INT that fits
into that mode) and x being SImode; for non-CONST_INT y it zero extends y
into SImode and compares that against x, for CONST_INT y it zero extends y
into SImode.  The problem is that when the zero extended constant isn't
usable directly, it forces it into a REG, but with y_mode mode, and then
compares against y.  That is wrong, because it should force it into a SImode
REG and compare that way.

2020-04-02  Jakub Jelinek  <jakub@redhat.com>

PR target/94435
* config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.

* gcc.target/aarch64/pr94435.c: New test.

gcc/ChangeLog
gcc/config/aarch64/aarch64.c
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/aarch64/pr94435.c [new file with mode: 0644]

index 9ded73c7f5c1f7297914e40e83f9fa636461798d..092e853a187ea6bbb4fcc3d918beebca4b043260 100644 (file)
@@ -1,3 +1,9 @@
+2020-04-02  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/94435
+       * config/aarch64/aarch64.c (aarch64_gen_compare_reg_maybe_ze): For
+       y_mode E_[QH]Imode and y being a CONST_INT, change y_mode to SImode.
+
 2020-04-01  Zackery Spytz  <zspytz@gmail.com>
 
        * doc/extend.texi: Fix a typo in the documentation of the
index f81c2947f16fd89b1a2d6ecf55e442a7550d5acd..78acd7ecfdb47cb6c75a3404817a94eddf9cdd20 100644 (file)
@@ -1918,7 +1918,10 @@ aarch64_gen_compare_reg_maybe_ze (RTX_CODE code, rtx x, rtx y,
   if (y_mode == E_QImode || y_mode == E_HImode)
     {
       if (CONST_INT_P (y))
-       y = GEN_INT (INTVAL (y) & GET_MODE_MASK (y_mode));
+       {
+         y = GEN_INT (INTVAL (y) & GET_MODE_MASK (y_mode));
+         y_mode = SImode;
+       }
       else
        {
          rtx t, cc_reg;
index 185750138a196179ee9199b018dc35526edf597a..bcf4ff335e9b4c621ace451fb1ca0c94ad3e979d 100644 (file)
@@ -1,3 +1,8 @@
+2020-04-02  Jakub Jelinek  <jakub@redhat.com>
+
+       PR target/94435
+       * gcc.target/aarch64/pr94435.c: New test.
+
 2020-04-02  Mark Eggleston <markeggleston@gcc.gnu.org>
 
        Backport from master
diff --git a/gcc/testsuite/gcc.target/aarch64/pr94435.c b/gcc/testsuite/gcc.target/aarch64/pr94435.c
new file mode 100644 (file)
index 0000000..5713c14
--- /dev/null
@@ -0,0 +1,25 @@
+/* PR target/94435 */
+/* { dg-do compile } */
+/* { dg-options "-march=armv8-a+nolse -moutline-atomics" } */
+
+int b, c, d, e, f, h;
+short g;
+int foo (int) __attribute__ ((__const__));
+
+void
+bar (void)
+{
+  while (1)
+    {
+      while (1)
+       {
+         __atomic_load_n (&e, 0);
+         if (foo (2))
+           __sync_val_compare_and_swap (&c, 0, f);
+         b = 1;
+         if (h == e)
+           break;
+       }
+      __sync_val_compare_and_swap (&g, -1, f);
+    }
+}