return frac_div_clk;
}
-static long phy_clk_round_rate(struct clk_hw *hw,
- unsigned long rate, unsigned long *parent_rate)
+static long fsl_samsung_hdmi_phy_clk_round_rate(struct clk_hw *hw,
+ unsigned long rate, unsigned long *parent_rate)
{
const struct phy_config *fract_div_phy;
u32 int_div_clk;
static const struct clk_ops phy_clk_ops = {
.recalc_rate = phy_clk_recalc_rate,
- .round_rate = phy_clk_round_rate,
+ .round_rate = fsl_samsung_hdmi_phy_clk_round_rate,
.set_rate = phy_clk_set_rate,
};