#define MEI_GSC_RPM_TIMEOUT 500
-static int mei_gsc_read_hfs(const struct mei_device *dev, int where, u32 *val)
+static int mei_gsc_read_hfs(const struct mei_device *dev, int where, const char *name, u32 *val)
{
struct mei_me_hw *hw = to_me_hw(dev);
*val = ioread32(hw->mem_addr + where + 0xC00);
+ trace_mei_reg_read(&dev->dev, name, where, *val);
return 0;
}
fw_status->count = fw_src->count;
for (i = 0; i < fw_src->count && i < MEI_FW_STATUS_MAX; i++) {
- ret = hw->read_fws(dev, fw_src->status[i],
+ ret = hw->read_fws(dev, fw_src->status[i], "PCI_CFG_HFS_X",
&fw_status->status[i]);
- trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HFS_X",
- fw_src->status[i],
- fw_status->status[i]);
if (ret)
return ret;
}
hw->hbuf_depth = (hcsr & H_CBD) >> 24;
reg = 0;
- hw->read_fws(dev, PCI_CFG_HFS_1, ®);
- trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HFS_1", PCI_CFG_HFS_1, reg);
+ hw->read_fws(dev, PCI_CFG_HFS_1, "PCI_CFG_HFS_1", ®);
hw->d0i3_supported =
((reg & PCI_CFG_HFS_1_D0I3_MSK) == PCI_CFG_HFS_1_D0I3_MSK);
if (!kind_is_gsc(dev) && !kind_is_gscfi(dev))
return;
- hw->read_fws(dev, PCI_CFG_HFS_5, &fwsts5);
- trace_mei_pci_cfg_read(&dev->dev, "PCI_CFG_HFS_5", PCI_CFG_HFS_5, fwsts5);
+ hw->read_fws(dev, PCI_CFG_HFS_5, "PCI_CFG_HFS_5", &fwsts5);
if ((fwsts5 & GSC_CFG_HFS_5_BOOT_TYPE_MSK) == GSC_CFG_HFS_5_BOOT_TYPE_PXP) {
if (dev->gsc_reset_to_pxp == MEI_DEV_RESET_TO_PXP_DEFAULT)
enum mei_pg_state pg_state;
bool d0i3_supported;
u8 hbuf_depth;
- int (*read_fws)(const struct mei_device *dev, int where, u32 *val);
+ int (*read_fws)(const struct mei_device *dev, int where, const char *name, u32 *val);
/* polling */
struct task_struct *polling_thread;
wait_queue_head_t wait_active;
#include "client.h"
#include "hw-me-regs.h"
#include "hw-me.h"
+#include "mei-trace.h"
/* mei_pci_tbl - PCI Device ID Table */
static const struct pci_device_id mei_me_pci_tbl[] = {
static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
#endif /* CONFIG_PM */
-static int mei_me_read_fws(const struct mei_device *dev, int where, u32 *val)
+static int mei_me_read_fws(const struct mei_device *dev, int where, const char *name, u32 *val)
{
struct pci_dev *pdev = to_pci_dev(dev->parent);
+ int ret;
- return pci_read_config_dword(pdev, where, val);
+ ret = pci_read_config_dword(pdev, where, val);
+ trace_mei_pci_cfg_read(&dev->dev, name, where, *val);
+ return ret;
}
/**