gcc/testsuite/

	* gcc.target/arm/register-variables.c: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@123071 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 72474a89ce2b3ae4ba744f11c37e3b8f3e5da8cf..2ac81780bf87443863df6c62eed81ca697fe82d0 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2007-03-19  Mark Shinwell  <shinwell@codesourcery.com>
+
+       * gcc.target/arm/register-variables.c: New.
+
 2007-03-19  Jeff Law  <law@redhat.com>
 
        * PR tree-optimization/30984

diff --git a/gcc/testsuite/gcc.target/arm/register-variables.c b/gcc/testsuite/gcc.target/arm/register-variables.c
new file mode 100644 (file)
index 0000000..8c874b2
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/register-variables.c
@@ -0,0 +1,21 @@
+/* { dg-do run } */
+/* { dg-options "-O" } */
+
+#include <stdlib.h>
+
+void __attribute__((noinline)) 
+bar(int a, int b)
+{
+  if (a != 43 || b != 42)
+    abort();
+}
+
+int main(void)
+{
+    register int r0 asm("r0") = 42;
+    register int r1 asm("r1") = 43;
+    asm volatile("": "+r" (r0), "+r" (r1));
+    bar(r1, r0);
+    return 0;
+}
+