ARM64: dts: bcm6856: Add BCMBCA peripherals

All the BCMBCA SoCs share a set of peripherals at 0xff800000,
albeit at slightly varying memory locations on the bus and
with varying IRQ assignments. ARM64 SoCs have additional
peripherals at 0xff858000. Extend the BCM6856 the PERF window
to 0x400000 and add the DMA block at offset 0x59000.

Add the watchdog, GPIO blocks, RNG, LED, second UART and DMA
blocks for the BCM6856 based on the vendor files 6856_map_part.h
and 6856_intr.h from the "bcmopen-consumer" code drop.

This SoC has up to 256 possible GPIOs due to having 8
registers with 32 GPIOs in each available.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20250512-bcmbca-peripherals-arm-v3-10-86f97ab4326f@linaro.org
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
index 00c62c1e5df00c722884a7adfcb7be08a43c0dc3..dcbd0fdd33d25fa340c417e8284826801ebc00bb 100644 (file)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6856.dtsi
@@ -93,11 +93,103 @@
                };
        };
 
+       /* PERF Peripherals */
        bus@ff800000 {
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
-               ranges = <0x0 0x0 0xff800000 0x800000>;
+               ranges = <0x0 0x0 0xff800000 0x400000>;
+
+               watchdog@480 {
+                       compatible = "brcm,bcm6345-wdt";
+                       reg = <0x480 0x10>;
+               };
+
+               watchdog@4c0 {
+                       compatible = "brcm,bcm6345-wdt";
+                       reg = <0x4c0 0x10>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 0 .. 31 */
+               gpio0: gpio@500 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x500 0x04>, <0x520 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 32 .. 63 */
+               gpio1: gpio@504 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x504 0x04>, <0x524 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 64 .. 95 */
+               gpio2: gpio@508 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x508 0x04>, <0x528 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 96 .. 127 */
+               gpio3: gpio@50c {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x50c 0x04>, <0x52c 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 128 .. 159 */
+               gpio4: gpio@510 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x510 0x04>, <0x530 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 160 .. 191 */
+               gpio5: gpio@514 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x514 0x04>, <0x534 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 192 .. 223 */
+               gpio6: gpio@518 {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x518 0x04>, <0x538 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
+
+               /* GPIOs 224 .. 255 */
+               gpio7: gpio@51c {
+                       compatible = "brcm,bcm6345-gpio";
+                       reg = <0x51c 0x04>, <0x53c 0x04>;
+                       reg-names = "dirout", "dat";
+                       gpio-controller;
+                       #gpio-cells = <2>;
+                       status = "disabled";
+               };
 
                uart0: serial@640 {
                        compatible = "brcm,bcm6345-uart";
@@ -108,6 +200,29 @@
                        status = "disabled";
                };
 
+               uart1: serial@660 {
+                       compatible = "brcm,bcm6345-uart";
+                       reg = <0x660 0x18>;
+                       interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&periph_clk>;
+                       clock-names = "refclk";
+                       status = "disabled";
+               };
+
+               leds: led-controller@800 {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "brcm,bcm63138-leds";
+                       reg = <0x800 0xdc>;
+                       status = "disabled";
+               };
+
+               rng@b80 {
+                       compatible = "brcm,iproc-rng200";
+                       reg = <0xb80 0x28>;
+                       interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+               };
+
                hsspi: spi@1000 {
                        #address-cells = <1>;
                        #size-cells = <0>;
@@ -133,5 +248,18 @@
                                reg = <0>;
                        };
                };
+
+               pl081_dma: dma-controller@59000 {
+                       compatible = "arm,pl081", "arm,primecell";
+                       // The magic B105F00D info is missing
+                       arm,primecell-periphid = <0x00041081>;
+                       reg = <0x59000 0x1000>;
+                       interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+                       memcpy-burst-size = <256>;
+                       memcpy-bus-width = <32>;
+                       clocks = <&periph_clk>;
+                       clock-names = "apb_pclk";
+                       #dma-cells = <2>;
+               };
        };
 };