arm64: dts: qcom: sm8450: don't disable dispcc by default

Enable display clock controller for all Qualcomm SM8450 powered boards
by default.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Link: https://lore.kernel.org/r/20240924100602.3813725-5-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi
index 9bafb3b350ff627277514be83910b72a283c1935..da378c2ed4825645efb9c07dd6973285108be99d 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi
@@ -3435,7 +3435,6 @@
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                        #power-domain-cells = <1>;
-                       status = "disabled";
                };
 
                pdc: interrupt-controller@b220000 {