&crtc_state->dpll_hw_state);
}
-static void xe3plpd_ddi_get_config(struct intel_encoder *encoder,
- struct intel_crtc_state *crtc_state)
-{
- struct intel_display *display = to_intel_display(encoder);
-
- intel_lt_phy_pll_readout_hw_state(encoder, &crtc_state->dpll_hw_state.ltpll);
-
- if (crtc_state->dpll_hw_state.ltpll.tbt_mode)
- crtc_state->port_clock = intel_mtl_tbt_calc_port_clock(encoder);
- else
- crtc_state->port_clock =
- intel_lt_phy_calc_port_clock(display, &crtc_state->dpll_hw_state.ltpll);
- intel_ddi_get_config(encoder, crtc_state);
-}
-
static bool icl_ddi_tc_pll_is_tbt(const struct intel_dpll *pll)
{
return pll->info->id == DPLL_ID_ICL_TBTPLL;
encoder->enable_clock = intel_mtl_pll_enable_clock;
encoder->disable_clock = intel_mtl_pll_disable_clock;
encoder->port_pll_type = intel_mtl_port_pll_type;
- encoder->get_config = xe3plpd_ddi_get_config;
+ if (intel_encoder_is_tc(encoder))
+ encoder->get_config = mtl_ddi_tc_phy_get_config;
+ else
+ encoder->get_config = mtl_ddi_non_tc_phy_get_config;
} else if (DISPLAY_VER(display) >= 14) {
encoder->enable_clock = intel_mtl_pll_enable_clock;
encoder->disable_clock = intel_mtl_pll_disable_clock;