aarch64: Fix segfault in aarch64_expand_epilogue [PR95361]

The stack frame for the function in the testcase consisted of two
SVE save slots.  Both saves had been shrink-wrapped, but for different
blocks, meaning that the stack allocation and deallocation were
separate from the saves themselves.  Before emitting the deallocation,
we tried to attach a REG_CFA_DEF_CFA note to the preceding instruction,
to redefine the CFA in terms of the stack pointer.  But in this case
there was no preceding instruction.

This in practice only happens for SVE because:

(a) We don't try to shrink-wrap wb_candidate* registers even when
    we've decided to treat them as normal saves and restores.
    I have a fix for that.

(b) Even with (a) fixed, we're (almost?) guaranteed to emit
    a stack tie for frames that are 64k or larger, so we end
    up hanging the REG_CFA_DEF_CFA note on that instead.

We should only need to redefine the CFA if it was previously
defined in terms of the frame pointer.  In other cases the CFA
should already be defined in terms of the stack pointer,
so redefining it is unnecessary but usually harmless.

2020-05-28  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	PR testsuite/95361
	* config/aarch64/aarch64.c (aarch64_expand_epilogue): Only
	redefine the CFA if we have CFI operations.

gcc/testsuite/
	PR testsuite/95361
	* gcc.target/aarch64/sve/pr95361.c: New test.

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 761293ea1d9ea80a4cfe527afb6126a6269c21d2..52787401e5dab16ee38b2d3d2458cfd92bd9587e 100644 (file)
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -8180,7 +8180,7 @@ aarch64_expand_epilogue (bool for_sibcall)
   if (callee_adjust != 0)
     aarch64_pop_regs (reg1, reg2, callee_adjust, &cfi_ops);
 
-  if (callee_adjust != 0 || maybe_gt (initial_adjust, 65536))
+  if (cfi_ops && (callee_adjust != 0 || maybe_gt (initial_adjust, 65536)))
     {
       /* Emit delayed restores and set the CFA to be SP + initial_adjust.  */
       insn = get_last_insn ();

diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr95361.c b/gcc/testsuite/gcc.target/aarch64/sve/pr95361.c
new file mode 100644 (file)
index 0000000..ce70d0d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/sve/pr95361.c
@@ -0,0 +1,11 @@
+/* { dg-options "-O2" } */
+
+__SVInt8_t
+f (__SVInt8_t x, int y)
+{
+  if (y == 1)
+    asm volatile ("" ::: "z8");
+  if (y == 2)
+    asm volatile ("" ::: "z9");
+  return x;
+}