]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: mediatek: mt7981b: add labels for UART0/1/2 nodes
authorBryan Hinton <bryan@bryanhinton.com>
Mon, 22 Sep 2025 03:58:09 +0000 (22:58 -0500)
committerAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Mon, 13 Oct 2025 09:34:15 +0000 (11:34 +0200)
Add stable labels (uart0, uart1, uart2) to the MT7981B SoC UART nodes so
board DTS files can reference them directly. This change is purely
cosmetic and introduces no functional differences.

Verification: Built dtbs and boot-tested mainline Image+DTB via U-Boot on
MT7981B hardware; decompiled DT shows the uart0 label present and the
serial0 alias (or absolute path) resolves to serial@11002000.

Signed-off-by: Bryan Hinton <bryan@bryanhinton.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
arch/arm64/boot/dts/mediatek/mt7981b.dtsi

index 277c11247c1323f3e7c738d9b0c3e9d3866b5cd6..5dae4a5f03a5b1163e062e2884e91dcb344e0fe9 100644 (file)
@@ -94,7 +94,7 @@
                        #pwm-cells = <2>;
                };
 
-               serial@11002000 {
+               uart0: serial@11002000 {
                        compatible = "mediatek,mt7981-uart", "mediatek,mt6577-uart";
                        reg = <0 0x11002000 0 0x100>;
                        interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                };
 
-               serial@11003000 {
+               uart1: serial@11003000 {
                        compatible = "mediatek,mt7981-uart", "mediatek,mt6577-uart";
                        reg = <0 0x11003000 0 0x100>;
                        interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
                        status = "disabled";
                };
 
-               serial@11004000 {
+               uart2: serial@11004000 {
                        compatible = "mediatek,mt7981-uart", "mediatek,mt6577-uart";
                        reg = <0 0x11004000 0 0x100>;
                        interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;