basic_block cfg_bb = bb->cfg_bb ();
auto &curr_prob
= m_vector_manager->vector_block_infos[cfg_bb->index].probability;
+
+ /* GCC assume entry block (bb 0) are always so
+ executed so set its probability as "always". */
if (ENTRY_BLOCK_PTR_FOR_FN (cfun) == cfg_bb)
curr_prob = profile_probability::always ();
+ /* Exit block (bb 1) is the block we don't need to process. */
+ if (EXIT_BLOCK_PTR_FOR_FN (cfun) == cfg_bb)
+ continue;
+
gcc_assert (curr_prob.initialized_p ());
FOR_EACH_EDGE (e, ei, cfg_bb->succs)
{
new_prob += curr_prob * e->probability;
}
}
- auto &exit_block
- = m_vector_manager->vector_block_infos[EXIT_BLOCK_PTR_FOR_FN (cfun)->index];
- exit_block.probability = profile_probability::always ();
}
/* Lazy vsetvl insertion for optimize > 0. */
--- /dev/null
+/* { dg-do compile } */
+/* { dg-options "-march=rv32gcv -mabi=ilp32d -O3" } */
+
+#include "riscv_vector.h"
+void __attribute__((noinline)) foo(int arr[4]) {
+__builtin_printf("%d %d %d %d\n", arr[0], arr[1], arr[2], arr[3]);
+}
+
+void __attribute__((noinline)) test() {
+// Intialization with 2 memsets leads to spilling of zero-splat value
+vint32m1_t a;
+int arr1[4] = {};
+foo(arr1);
+int arr2[4] = {};
+foo(arr2);
+asm volatile ("# %0" : "+vr" (a));
+throw int();
+}
+
+int main() {
+try {
+ test();
+} catch (...) {
+ __builtin_printf("hello\n");
+};
+return 0;
+}