****************************************************************************
*/
.section ".stack", "aw", @nobits
- .align 8
+ .balign 8
.globl _stack
_stack:
.space STACK_SIZE
****************************************************************************
*/
.section ".stack16", "aw", @nobits
- .align 8
+ .balign 8
.globl _stack16
_stack16:
.space 4096
****************************************************************************
*/
.section ".data16", "aw", @progbits
- .align 16
+ .balign 16
.globl hidemem_base
.globl hidemem_umalloc
.globl hidemem_textdata
*/
.section ".text16.data", "aw", @progbits
.globl ppxe
- .align 16
+ .balign 16
ppxe:
.ascii "!PXE" /* Signature */
.byte pxe_length /* StructLength */
*/
.section ".text16.data", "aw", @progbits
.globl pxenv
- .align 16
+ .balign 16
pxenv:
.ascii "PXENV+" /* Signature */
.word 0x0201 /* Version */
/* Overlay number */
.word 0
- .align 16, 0
+ .balign 16, 0
.globl _exe_start
_exe_start:
.word 0
.size mromheader, . - mromheader
- .align 4
+ .balign 4
mpciheader:
.ascii "PCIR" /* Signature */
.word pci_vendor_id /* Vendor identification */
.previous
.ifeqs BUSTYPE, "PCIR"
- .align 4
+ .balign 4
pciheader:
.ascii "PCIR" /* Signature */
.word pci_vendor_id /* Vendor identification */
* BIOSes will scan on 16-byte boundaries rather than using
* the offset stored at 0x1a
*/
- .align 16
+ .balign 16
pnpheader:
.ascii "$PnP" /* Signature */
.byte 0x01 /* Structure revision */
.globl undiheader
.weak undiloader
- .align 4
+ .balign 4
undiheader:
.ascii "UNDI" /* Signature */
.byte undiheader_len /* Length of structure */
.equ undiheader_len, . - undiheader
.size undiheader, . - undiheader
- .align 4
+ .balign 4
ipxeheader:
.ascii "iPXE" /* Signature */
.byte ipxeheader_len /* Length of structure */
literal: .rept ( ( 1 << LZMA_LC ) * 0x300 )
.word 0
.endr
- .align 4
+ .balign 4
.equ sizeof__lzma_dec, . - lzma_dec
.previous
ret
.section ".text16.early.data", "aw", @progbits
- .align 2
+ .balign 2
enable_a20_method:
.word 0
.size enable_a20_method, . - enable_a20_method
****************************************************************************
*/
.section ".data16.gdt", "aw", @progbits
- .align 16
+ .balign 16
gdt:
gdtr: /* The first GDT entry is unused, the GDTR can fit here. */
gdt_limit: .word gdt_length - 1
/* Shared temporary static buffer */
.section ".bss16.rm_tmpbuf", "aw", @nobits
- .align 16
+ .balign 16
rm_tmpbuf:
.space VC_TMP_END
.size rm_tmpbuf, . - rm_tmpbuf
****************************************************************************
*/
.section ".pages", "aw", @nobits
- .align SIZEOF_PT
+ .balign SIZEOF_PT
/* Page map level 4 entries (PML4Es)
*
*/
#define __einfo_error( einfo ) ( { \
__asm__ ( ".section \".einfo\", \"\", " PROGBITS_OPS "\n\t" \
- ".align 8\n\t" \
+ ".balign 8\n\t" \
"\n1:\n\t" \
".long ( 4f - 1b )\n\t" \
".long %c0\n\t" \
".long %c1\n\t" \
"\n2:\t.asciz \"" __einfo_desc ( einfo ) "\"\n\t" \
"\n3:\t.asciz \"" __FILE__ "\"\n\t" \
- ".align 8\n\t" \
+ ".balign 8\n\t" \
"\n4:\n\t" \
".previous\n\t" : : \
"i" ( __einfo_errno ( einfo ) ), \