drm/amdkfd: hard-code cacheline for gc943,gc944

commit 55ed120dcfdde2478c3ebfa1c0ac4ed1e430053b upstream.

Cacheline size is not available in IP discovery for gc943,gc944.

Signed-off-by: David Yat Sin <David.YatSin@amd.com>
Reviewed-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
index 48caecf7e72ed139872819c1a48cf96ae4528a58..8de61cc524c94345d5c844e854896592a2775cad 100644 (file)
--- a/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_crat.c
@@ -1509,6 +1509,8 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
        if (adev->gfx.config.gc_tcp_size_per_cu) {
                pcache_info[i].cache_size = adev->gfx.config.gc_tcp_size_per_cu;
                pcache_info[i].cache_level = 1;
+               /* Cacheline size not available in IP discovery for gc943,gc944 */
+               pcache_info[i].cache_line_size = 128;
                pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
                                        CRAT_CACHE_FLAGS_DATA_CACHE |
                                        CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1520,6 +1522,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
                pcache_info[i].cache_size =
                        adev->gfx.config.gc_l1_instruction_cache_size_per_sqc;
                pcache_info[i].cache_level = 1;
+               pcache_info[i].cache_line_size = 64;
                pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
                                        CRAT_CACHE_FLAGS_INST_CACHE |
                                        CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1530,6 +1533,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
        if (adev->gfx.config.gc_l1_data_cache_size_per_sqc) {
                pcache_info[i].cache_size = adev->gfx.config.gc_l1_data_cache_size_per_sqc;
                pcache_info[i].cache_level = 1;
+               pcache_info[i].cache_line_size = 64;
                pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
                                        CRAT_CACHE_FLAGS_DATA_CACHE |
                                        CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1540,6 +1544,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
        if (adev->gfx.config.gc_tcc_size) {
                pcache_info[i].cache_size = adev->gfx.config.gc_tcc_size;
                pcache_info[i].cache_level = 2;
+               pcache_info[i].cache_line_size = 128;
                pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
                                        CRAT_CACHE_FLAGS_DATA_CACHE |
                                        CRAT_CACHE_FLAGS_SIMD_CACHE);
@@ -1550,6 +1555,7 @@ static int kfd_fill_gpu_cache_info_from_gfx_config_v2(struct kfd_dev *kdev,
        if (adev->gmc.mall_size) {
                pcache_info[i].cache_size = adev->gmc.mall_size / 1024;
                pcache_info[i].cache_level = 3;
+               pcache_info[i].cache_line_size = 64;
                pcache_info[i].flags = (CRAT_CACHE_FLAGS_ENABLED |
                                        CRAT_CACHE_FLAGS_DATA_CACHE |
                                        CRAT_CACHE_FLAGS_SIMD_CACHE);