drm/panfrost: add amlogic reset quirk callback

[ Upstream commit 110003002291525bb209f47e6dbf121a63249a97 ]

The T820, G31 & G52 GPUs integrated by Amlogic in the respective GXM,
G12A/SM1 & G12B SoCs needs a quirk in the PWR registers at the GPU reset
time.

Since the Amlogic's integration of the GPU cores with the SoC is not
publicly documented we do not know what does these values, but they
permit having a fully functional GPU running with Panfrost.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
[Steven: Fix typo in commit log]
Reviewed-by: Steven Price <steven.price@arm.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Signed-off-by: Steven Price <steven.price@arm.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20200916150147.25753-3-narmstrong@baylibre.com
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.c b/drivers/gpu/drm/panfrost/panfrost_gpu.c
index dfe4c9151eaf216ec2a2deb2de6d41ee6e6a6854..a9d08a2927aa3fd56dd773f257cc788ae3af598d 100644 (file)
--- a/drivers/gpu/drm/panfrost/panfrost_gpu.c
+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.c
@@ -75,6 +75,17 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev)
        return 0;
 }
 
+void panfrost_gpu_amlogic_quirk(struct panfrost_device *pfdev)
+{
+       /*
+        * The Amlogic integrated Mali-T820, Mali-G31 & Mali-G52 needs
+        * these undocumented bits in GPU_PWR_OVERRIDE1 to be set in order
+        * to operate correctly.
+        */
+       gpu_write(pfdev, GPU_PWR_KEY, GPU_PWR_KEY_UNLOCK);
+       gpu_write(pfdev, GPU_PWR_OVERRIDE1, 0xfff | (0x20 << 16));
+}
+
 static void panfrost_gpu_init_quirks(struct panfrost_device *pfdev)
 {
        u32 quirks = 0;

diff --git a/drivers/gpu/drm/panfrost/panfrost_gpu.h b/drivers/gpu/drm/panfrost/panfrost_gpu.h
index 4112412087b27c4abb1387a4f0432fc413160f88..468c51e7e46db53618e2ca8da7fc2f8ff0a680fd 100644 (file)
--- a/drivers/gpu/drm/panfrost/panfrost_gpu.h
+++ b/drivers/gpu/drm/panfrost/panfrost_gpu.h
@@ -16,4 +16,6 @@ int panfrost_gpu_soft_reset(struct panfrost_device *pfdev);
 void panfrost_gpu_power_on(struct panfrost_device *pfdev);
 void panfrost_gpu_power_off(struct panfrost_device *pfdev);
 
+void panfrost_gpu_amlogic_quirk(struct panfrost_device *pfdev);
+
 #endif

diff --git a/drivers/gpu/drm/panfrost/panfrost_regs.h b/drivers/gpu/drm/panfrost/panfrost_regs.h
index ea38ac60581c6a93234b03de13dff15ac4d8ed59..eddaa62ad8b0eb81d54e7062e73ceb4be2bdb835 100644 (file)
--- a/drivers/gpu/drm/panfrost/panfrost_regs.h
+++ b/drivers/gpu/drm/panfrost/panfrost_regs.h
@@ -51,6 +51,10 @@
 #define GPU_STATUS                     0x34
 #define   GPU_STATUS_PRFCNT_ACTIVE     BIT(2)
 #define GPU_LATEST_FLUSH_ID            0x38
+#define GPU_PWR_KEY                    0x50    /* (WO) Power manager key register */
+#define  GPU_PWR_KEY_UNLOCK            0x2968A819
+#define GPU_PWR_OVERRIDE0              0x54    /* (RW) Power manager override settings */
+#define GPU_PWR_OVERRIDE1              0x58    /* (RW) Power manager override settings */
 #define GPU_FAULT_STATUS               0x3C
 #define GPU_FAULT_ADDRESS_LO           0x40
 #define GPU_FAULT_ADDRESS_HI           0x44