]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: renesas: r9a09g047: Add CRU, CSI2 nodes
authorTommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Wed, 14 May 2025 16:24:17 +0000 (18:24 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 10 Jun 2025 07:58:34 +0000 (09:58 +0200)
Add CRU, CSI2 nodes to RZ/RZG3E SoC DTSI.

Signed-off-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250514162422.910114-2-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a09g047.dtsi

index 3d3aa371dad8614fc59c433a9f85cd17394f418e..a0d4fab4fe0542124e99385a9f05fa6f05673a3c 100644 (file)
                                status = "disabled";
                        };
                };
+
+               cru: video@16000000 {
+                       compatible = "renesas,r9a09g047-cru";
+                       reg = <0 0x16000000 0 0x400>;
+                       clocks = <&cpg CPG_MOD 0xd3>,
+                                <&cpg CPG_MOD 0xd4>,
+                                <&cpg CPG_MOD 0xd2>;
+                       clock-names = "video", "apb", "axi";
+                       interrupts = <GIC_SPI 838 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 839 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 840 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 841 IRQ_TYPE_EDGE_RISING>,
+                                    <GIC_SPI 842 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "image_conv", "axi_mst_err",
+                                         "vd_addr_wend", "sd_addr_wend",
+                                         "vsd_addr_wend";
+                       resets = <&cpg 0xc5>, <&cpg 0xc6>;
+                       reset-names = "presetn", "aresetn";
+                       power-domains = <&cpg>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+
+                                       reg = <1>;
+                                       crucsi2: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&csi2cru>;
+                                       };
+                               };
+                       };
+               };
+
+               csi2: csi2@16000400 {
+                       compatible = "renesas,r9a09g047-csi2", "renesas,r9a09g057-csi2";
+                       reg = <0 0x16000400 0 0xc00>;
+                       interrupts = <GIC_SPI 837 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&cpg CPG_MOD 0xd3>, <&cpg CPG_MOD 0xd4>;
+                       clock-names = "video", "apb";
+                       resets = <&cpg 0xc5>, <&cpg 0xc7>;
+                       reset-names = "presetn", "cmn-rstb";
+                       power-domains = <&cpg>;
+                       status = "disabled";
+
+                       ports {
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+
+                               port@0 {
+                                       reg = <0>;
+                               };
+
+                               port@1 {
+                                       #address-cells = <1>;
+                                       #size-cells = <0>;
+                                       reg = <1>;
+
+                                       csi2cru: endpoint@0 {
+                                               reg = <0>;
+                                               remote-endpoint = <&crucsi2>;
+                                       };
+                               };
+                       };
+               };
        };
 
        timer {