Daily bump.

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fbcc89a6b40b2c89001a7c670a663a41d3578cac..1670e6804fb31e5085119583f4830c75754f5433 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,29 @@
+2023-05-13  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+
+       * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
+       aarch64_expand_vector_init to this, and remove  interleaving case.
+       Recursively call aarch64_expand_vector_init_fallback, instead of
+       aarch64_expand_vector_init.
+       (aarch64_unzip_vector_init): New function.
+       (aarch64_expand_vector_init): Likewise.
+
+2023-05-13  Kito Cheng  <kito.cheng@sifive.com>
+
+       * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
+       Pull out function call from the gcc_assert.
+
+2023-05-13  Kito Cheng  <kito.cheng@sifive.com>
+
+       * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
+       (policy_to_str): New.
+       (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
+
+2023-05-13  Andrew Pinski  <apinski@marvell.com>
+
+       PR tree-optimization/109834
+       * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
+       (popcount(rotate(x,y))->popcount(x)): Likewise.
+
 2023-05-12  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also

diff --git a/gcc/DATESTAMP b/gcc/DATESTAMP
index 9e964bcb0cd001a6230406fa92a8f1c1d4cd1ece..1d22f342aef33f9d55fad97bca0180437b23ea98 100644 (file)
--- a/gcc/DATESTAMP
+++ b/gcc/DATESTAMP
@@ -1 +1 @@
-20230513
+20230514

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 9a225cd7f4879863ba3aed2eb5b593b1cb188aba..9835c8b539f9b726229a3cb009424318fadd004b 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,24 @@
+2023-05-13  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>
+
+       * gcc.target/aarch64/ldp_stp_16.c (cons2_8_float): Adjust for new
+       code-gen.
+       * gcc.target/aarch64/sve/acle/general/dupq_5.c: Likewise.
+       * gcc.target/aarch64/sve/acle/general/dupq_6.c: Likewise.
+       * gcc.target/aarch64/interleave-init-1.c: Rename to ...
+       * gcc.target/aarch64/vec-init-18.c: ... this.
+       * gcc.target/aarch64/vec-init-19.c: New test.
+       * gcc.target/aarch64/vec-init-20.c: Likewise.
+       * gcc.target/aarch64/vec-init-21.c: Likewise.
+       * gcc.target/aarch64/vec-init-22-size.c: Likewise.
+       * gcc.target/aarch64/vec-init-22-speed.c: Likewise.
+       * gcc.target/aarch64/vec-init-22.h: New header.
+
+2023-05-13  Andrew Pinski  <apinski@marvell.com>
+
+       PR tree-optimization/109834
+       * gcc.c-torture/compile/pr109834-1.c: New test.
+       * gcc.dg/tree-ssa/pr109834-1.c: New test.
+
 2023-05-12  Jerry DeLisle  <jvdelisle@gcc.gnu.org>
 
        PR fortran/109662

diff --git a/libgm2/ChangeLog b/libgm2/ChangeLog
index 33abedc278f621aa5bafe81ba06c47a73e4aabaa..1b83f679591991db88eba73d048d4276e83ce9fa 100644 (file)
--- a/libgm2/ChangeLog
+++ b/libgm2/ChangeLog
@@ -1,3 +1,19 @@
+2023-05-13  Gaius Mulley  <gaiusmod2@gmail.com>
+
+       * libm2cor/KeyBoardLEDs.cc (TRUE): Remove.
+       (FALSE): Remove.
+       (init): Replace TRUE with true.
+       * libm2iso/RTco.cc (TRUE): Remove.
+       (FALSE): Remove.
+       (initSem): Replace int with bool.
+       (init): Replace FALSE with false.
+       * libm2pim/sckt.cc (TRUE): Remove.
+       (FALSE): Remove.
+       * libm2pim/wrapc.cc: Replace TRUE with true
+       and FALSE with false.
+       (FALSE): Remove.
+       (TRUE): Remove.
+
 2023-05-08  Thomas Schwinge  <thomas@codesourcery.com>
 
        * autogen.sh: Remove.