drm/amd/display: Add missing post flip calls

[ Upstream commit 54980f3c63ed3e5cca3d251416581193c90eae76 ]

[WHY&HOW]
dc_post_update_surfaces_to_stream needs to be called after a full update
completes in order to optimize clocks and watermarks for power. Add
missing calls before idle entry is requested to ensure optimal power.

Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Ivan Lipski <ivan.lipski@amd.com>
Tested-by: Dan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 57b46572fba27e7b09c9342ef56dde62b3bfeb23..d66c9609efd8df98ad92891e9ddfec583df0085e 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -427,8 +427,7 @@ static inline bool update_planes_and_stream_adapter(struct dc *dc,
        /*
         * Previous frame finished and HW is ready for optimization.
         */
-       if (update_type == UPDATE_TYPE_FAST)
-               dc_post_update_surfaces_to_stream(dc);
+       dc_post_update_surfaces_to_stream(dc);
 
        return dc_update_planes_and_stream(dc,
                                           array_of_surface_update,

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
index 2047ac51f1b667ef6811fb5c8759b30586cbc45c..2e7ee77c010e1852b181caa411ed166dec0f63cb 100644 (file)
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_crtc.c
@@ -218,8 +218,10 @@ static void amdgpu_dm_idle_worker(struct work_struct *work)
                        break;
                }
 
-               if (idle_work->enable)
+               if (idle_work->enable) {
+                       dc_post_update_surfaces_to_stream(idle_work->dm->dc);
                        dc_allow_idle_optimizations(idle_work->dm->dc, true);
+               }
                mutex_unlock(&idle_work->dm->dc_lock);
        }
        idle_work->dm->idle_workqueue->running = false;
@@ -273,8 +275,10 @@ static void amdgpu_dm_crtc_vblank_control_worker(struct work_struct *work)
                        vblank_work->acrtc->dm_irq_params.allow_sr_entry);
        }
 
-       if (dm->active_vblank_irq_count == 0)
+       if (dm->active_vblank_irq_count == 0) {
+               dc_post_update_surfaces_to_stream(dm->dc);
                dc_allow_idle_optimizations(dm->dc, true);
+       }
 
        mutex_unlock(&dm->dc_lock);