]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
arm64: dts: renesas: ulcb: ulcb-kf: Describe PCIe/USB3.0 clock generator
authorMarek Vasut <marek.vasut+renesas@mailbox.org>
Sun, 18 Jan 2026 13:49:56 +0000 (14:49 +0100)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 6 Mar 2026 12:18:46 +0000 (13:18 +0100)
Describe the 9FGV0841 PCIe and USB3.0 clock generator present on ULCB
boards.  The clock generator supplies 100 MHz differential clock for
both PCIe ports, the USB 3.0 PHY and SATA.

SATA is not yet described in the ULCB DT, therefore the connection to
this clock generator is not described here either.

The H3 ULCB schematic does describe connection from output DIF7 to
USB3S1_CLK_*, but these signals do not exist on the SoC, therefore
this connection is also not described.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260118135038.8033-9-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
arch/arm64/boot/dts/renesas/ulcb.dtsi

index 2a157d1efb3d32306a637bcabff884f19741016b..97014bcfbb1d2257a371380349c4177b6aa8073f 100644 (file)
 };
 
 &pcie_bus_clk {
-       clock-frequency = <100000000>;
+       status = "disabled";
 };
 
 &pciec0 {
+       clocks = <&cpg CPG_MOD 319>, <&pcie_usb_clk 1>;
        status = "okay";
 };
 
+&pciec0_rp {
+       clocks = <&pcie_usb_clk 3>;
+};
+
 &pciec1 {
+       clocks = <&cpg CPG_MOD 318>, <&pcie_usb_clk 2>;
        status = "okay";
 
        vpcie1v5-supply = <&pcie_1v5>;
        vpcie3v3-supply = <&pcie_3v3>;
 };
 
+&pciec1_rp {
+       clocks = <&pcie_usb_clk 4>;
+};
+
 &pfc {
        can0_pins: can0 {
                groups = "can0_data_a";
        status = "okay";
 };
 
+&usb3_phy0 {
+       clocks = <&cpg CPG_MOD 328>, <&pcie_usb_clk 6>, <&usb_extal_clk>;
+       status = "okay";
+};
+
+&usb3s0_clk {
+       status = "disabled";
+};
+
 &xhci0 {
        status = "okay";
 };
index 241caf737abbdb14300c2220f82686e52eb74460..67fd6a65db897946c6095261b97b7eb30d287ca3 100644 (file)
                clock-frequency = <12288000>;
        };
 
+       pcie_usb_refclk: clk-x24 {
+               compatible = "fixed-clock";
+               #clock-cells = <0>;
+               clock-frequency = <25000000>;
+       };
+
        hdmi0-out {
                compatible = "hdmi-connector";
                type = "a";
 
        clock-frequency = <400000>;
 
+       pcie_usb_clk: clk@68 {
+               compatible = "renesas,9fgv0841";
+               reg = <0x68>;
+               clocks = <&pcie_usb_refclk>;
+               #clock-cells = <1>;
+       };
+
        versaclock5: clock-generator@6a {
                compatible = "idt,5p49v5925";
                reg = <0x6a>;