drm/i915/display: Wait for VRR PUSH status update

After VRR Push is sent, need to wait till flipline decision boundary
to get Push bit to get cleared.

--v2:
- Adjust delays to vrr vmin vblank delays. (Ankit)

--v3:
- Change intel_vrr_vmin_safe_window_end() so that
intel_dsb_wait_for_delayed_vblank() uses correct delay. (Ankit)

--v4:
- Simplify intel_vrr_vmin_safe_window_end implementation. (Ankit)

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Link: https://patch.msgid.link/20251223104542.2688548-15-mitulkumar.ajitkumar.golani@intel.com

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 68b39fe0f7bc191d9927c24afd4071434a7c2c39..a4a198a2851988c20dda5a8f070041f3b62f138f 100644 (file)
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -1095,10 +1095,21 @@ int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state)
                return crtc_state->hw.adjusted_mode.crtc_vdisplay;
 }
 
+static int
+intel_vrr_dcb_vmin_vblank_start(const struct intel_crtc_state *crtc_state)
+{
+       return (intel_vrr_dcb_vmin_vblank_start_next(crtc_state) < 0) ?
+               intel_vrr_dcb_vmin_vblank_start_final(crtc_state) :
+               intel_vrr_dcb_vmin_vblank_start_next(crtc_state);
+}
+
 int intel_vrr_vmin_safe_window_end(const struct intel_crtc_state *crtc_state)
 {
-       return intel_vrr_vmin_vblank_start(crtc_state) -
-              crtc_state->set_context_latency;
+       int vmin_vblank_start = crtc_state->vrr.dc_balance.enable ?
+                       intel_vrr_dcb_vmin_vblank_start(crtc_state) :
+                       intel_vrr_vmin_vblank_start(crtc_state);
+
+       return vmin_vblank_start - crtc_state->set_context_latency;
 }
 
 int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state *crtc_state)