Also fixed up out-of-date comments for run_innerloop.
git-svn-id: svn://svn.valgrind.org/valgrind/trunk@3167
Exports of vg_main.c
------------------------------------------------------------------ */
-/* Is this a SSE/SSE2-capable CPU? If so, we had better save/restore
- the SSE state all over the place. This is set up very early, in
- main(). We have to determine it early since we can't even
- correctly snapshot the startup machine state without it. */
-extern Bool VG_(have_ssestate);
-
/* Tell the logging mechanism whether we are logging to a file
descriptor or a socket descriptor. */
extern Bool VG_(logging_to_filedes);
Exports of vg_dispatch.S
------------------------------------------------------------------ */
-/* Run a thread for a (very short) while, until some event happens
- which means we need to defer to the scheduler. This is passed
- a pointer to the VEX guest state (arch.vex). */
+/* This subroutine is called from the C world. It is passed
+ a pointer to the VEX guest state (arch.vex). It must run code
+ from the instruction pointer in the guest state, and exit when
+ VG_(dispatch_ctr) reaches zero, or we need to defer to the scheduler.
+ The return value must indicate why it returned back to the scheduler.
+ It can also be exited if the executing code throws a non-resumable
+ signal, for example SIGSEGV, in which case control longjmp()s back past
+ here.
+
+ This code simply handles the common case fast -- when the translation
+ address is found in the translation cache. For anything else, the
+ scheduler does the work.
+*/
extern UInt VG_(run_innerloop) ( void* guest_state );
/* ---------------------------------------------------------------------
struct vki_rlimit VG_(client_rlimit_data);
struct vki_rlimit VG_(client_rlimit_stack);
-/* This is set early to indicate whether this CPU has the
- SSE/fxsave/fxrestor features. */
-Bool VG_(have_ssestate);
-
/* stage1 (main) executable */
static Int vgexecfd = -1;
/*------------------------------------------------------------*/
-/*--- The normal-case dispatch machinery. ---*/
+/*--- The dispatch loop. ---*/
/*------------------------------------------------------------*/
-/* To transfer to an (original) code address, load it into %eax and
- jump to vg_dispatch. This fragment of code tries to find the
- address of the corresponding translation by searching the translation
- table. If it fails, a new translation is made, added to the
- translation table, and then jumped to. Almost all the hard
- work is done by C routines; this code simply handles the
- common case fast -- when the translation address is found in
- the translation cache.
-
- At entry, %eax is the only live (real-machine) register; the
- entire simulated state is tidily saved in vg_m_state.
-*/
-
-
#define TT_LOOKUP(reg, fail) \
movl %eax, reg; \
andl $VG_TT_FAST_MASK, reg; \
cmpl %eax, (reg); \
jnz fail
-/* The C world needs a way to get started simulating. So we provide
- a function void vg_run_innerloop ( void ), which starts running
- from vg_m_eip, and exits when the counter reaches zero. This loop
- can also exit if vg_oursignalhandler() catches a non-resumable
- signal, for example SIGSEGV. It then longjmp()s back past here.
-*/
-
/* signature: UInt VG_(run_innerloop) ( void* guest_state ) */
.globl VG_(run_innerloop)
/* Set up the guest state pointer */
movl 28(%esp), %ebp
- /* fetch m_eip into %eax */
+ /* fetch %EIP into %eax */
movl VG_(instr_ptr_offset), %esi
movl (%ebp, %esi, 1), %eax
/* fall into main loop */
+ /* Here, %eax is the only live (real) register. The entire
+ simulated state is saved in the ThreadState. */
+
dispatch_boring:
/* save the jump address in the guest state */
movl VG_(instr_ptr_offset), %esi
#include "libvex_guest_x86.h"
+/* This is set early to indicate whether this CPU has the
+ SSE/fxsave/fxrestor features. */
+Bool VG_(have_ssestate);
+
/*------------------------------------------------------------*/
/*--- Initialising the first thread ---*/
/*------------------------------------------------------------*/
#include "x86_private_asm.h" // private arch-specific asm stuff
#include "tool_arch.h" // arch-specific tool stuff
+/* ---------------------------------------------------------------------
+ Exports of state.c that are not core-visible
+ ------------------------------------------------------------------ */
+
+/* Is this a SSE/SSE2-capable CPU? If so, we had better save/restore
+ the SSE state all over the place. This is set up very early, since we
+ can't even correctly snapshot the startup machine state without it. */
+extern Bool VG_(have_ssestate);
+
/* ---------------------------------------------------------------------
Exports of vg_ldt.c
------------------------------------------------------------------ */