realtek: use common dtsi for Zyxel GS1900-24

As there are actually 2 versions of the GS1900-24 where the only
difference is the amount of ram, use a common dtsi and make the
original A1 model dts include the dtsi and only override the memory size.

Signed-off-by: Joe Holden <jwh@zorins.us>
Move memory size to device dts.
Signed-off-by: Goetz Goerisch <ggoerisch@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/21595
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-a1.dts b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-a1.dts
index 214f2c7afda68c24fa7bfca18304b6f3373dca15..dc80c5f4fb996e07a40989bbee5db3820ca85d58 100644 (file)
--- a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-a1.dts
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24-a1.dts
@@ -1,7 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-or-later
 
-#include "rtl8380_zyxel_gs1900.dtsi"
-#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+#include "rtl8382_zyxel_gs1900-24.dtsi"
 
 / {
        compatible = "zyxel,gs1900-24-a1", "realtek,rtl838x-soc";
@@ -10,119 +9,4 @@
        memory@0 {
                reg = <0x0 0x4000000>;
        };
-
-       /* i2c of the left SFP cage: port 25 */
-       i2c0: i2c-gpio-0 {
-               compatible = "i2c-gpio";
-               sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-               scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-               i2c-gpio,delay-us = <2>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-       };
-
-       sfp0: sfp-p25 {
-               compatible = "sff,sfp";
-               i2c-bus = <&i2c0>;
-               los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
-               tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
-               mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
-               tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
-       };
-
-       /* i2c of the right SFP cage: port 26 */
-       i2c1: i2c-gpio-1 {
-               compatible = "i2c-gpio";
-               sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-               scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
-               i2c-gpio,delay-us = <2>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-       };
-
-       sfp1: sfp-p26 {
-               compatible = "sff,sfp";
-               i2c-bus = <&i2c1>;
-               los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
-               tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
-               mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
-               tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
-       };
-};
-
-&uart1 {
-       status = "okay";
-};
-
-&mdio_bus0 {
-       EXTERNAL_PHY(0)
-       EXTERNAL_PHY(1)
-       EXTERNAL_PHY(2)
-       EXTERNAL_PHY(3)
-       EXTERNAL_PHY(4)
-       EXTERNAL_PHY(5)
-       EXTERNAL_PHY(6)
-       EXTERNAL_PHY(7)
-
-       EXTERNAL_PHY(16)
-       EXTERNAL_PHY(17)
-       EXTERNAL_PHY(18)
-       EXTERNAL_PHY(19)
-       EXTERNAL_PHY(20)
-       EXTERNAL_PHY(21)
-       EXTERNAL_PHY(22)
-       EXTERNAL_PHY(23)
-};
-
-&switch0 {
-       ports {
-               SWITCH_PORT_SDS(0, 1, 0, qsgmii)
-               SWITCH_PORT_SDS(1, 2, 0, qsgmii)
-               SWITCH_PORT_SDS(2, 3, 0, qsgmii)
-               SWITCH_PORT_SDS(3, 4, 0, qsgmii)
-               SWITCH_PORT_SDS(4, 5, 1, qsgmii)
-               SWITCH_PORT_SDS(5, 6, 1, qsgmii)
-               SWITCH_PORT_SDS(6, 7, 1, qsgmii)
-               SWITCH_PORT_SDS(7, 8, 1, qsgmii)
-
-               SWITCH_PORT(8, 9, internal)
-               SWITCH_PORT(9, 10, internal)
-               SWITCH_PORT(10, 11, internal)
-               SWITCH_PORT(11, 12, internal)
-               SWITCH_PORT(12, 13, internal)
-               SWITCH_PORT(13, 14, internal)
-               SWITCH_PORT(14, 15, internal)
-               SWITCH_PORT(15, 16, internal)
-
-               SWITCH_PORT_SDS(16, 17, 2, qsgmii)
-               SWITCH_PORT_SDS(17, 18, 2, qsgmii)
-               SWITCH_PORT_SDS(18, 19, 2, qsgmii)
-               SWITCH_PORT_SDS(19, 20, 2, qsgmii)
-               SWITCH_PORT_SDS(20, 21, 3, qsgmii)
-               SWITCH_PORT_SDS(21, 22, 3, qsgmii)
-               SWITCH_PORT_SDS(22, 23, 3, qsgmii)
-               SWITCH_PORT_SDS(23, 24, 3, qsgmii)
-
-               port@24 {
-                       reg = <24>;
-                       label = "lan25";
-                       pcs-handle = <&serdes4>;
-                       phy-mode = "1000base-x";
-                       managed = "in-band-status";
-                       sfp = <&sfp0>;
-               };
-
-               port@26 {
-                       reg = <26>;
-                       label = "lan26";
-                       pcs-handle = <&serdes5>;
-                       phy-mode = "1000base-x";
-                       managed = "in-band-status";
-                       sfp = <&sfp1>;
-               };
-       };
-};
-
-&gpio1 {
-       /delete-node/ poe_enable;
 };

diff --git a/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24.dtsi b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24.dtsi
new file mode 100644 (file)
index 0000000..158c8db
--- /dev/null
+++ b/target/linux/realtek/dts/rtl8382_zyxel_gs1900-24.dtsi
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+#include "rtl8380_zyxel_gs1900.dtsi"
+#include "rtl8380_zyxel_gs1900_gpio.dtsi"
+
+/ {
+
+       /* i2c of the left SFP cage: port 25 */
+       i2c0: i2c-gpio-0 {
+               compatible = "i2c-gpio";
+               sda-gpios = <&gpio1 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               scl-gpios = <&gpio1 25 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               i2c-gpio,delay-us = <2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
+       sfp0: sfp-p25 {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c0>;
+               los-gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
+               tx-fault-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+               mod-def0-gpio = <&gpio1 26 GPIO_ACTIVE_LOW>;
+               tx-disable-gpio = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+       };
+
+       /* i2c of the right SFP cage: port 26 */
+       i2c1: i2c-gpio-1 {
+               compatible = "i2c-gpio";
+               sda-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               scl-gpios = <&gpio1 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+               i2c-gpio,delay-us = <2>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+       };
+
+       sfp1: sfp-p26 {
+               compatible = "sff,sfp";
+               i2c-bus = <&i2c1>;
+               los-gpio = <&gpio1 33 GPIO_ACTIVE_HIGH>;
+               tx-fault-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+               mod-def0-gpio = <&gpio1 32 GPIO_ACTIVE_LOW>;
+               tx-disable-gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>;
+       };
+};
+
+&uart1 {
+       status = "okay";
+};
+
+&mdio_bus0 {
+       EXTERNAL_PHY(0)
+       EXTERNAL_PHY(1)
+       EXTERNAL_PHY(2)
+       EXTERNAL_PHY(3)
+       EXTERNAL_PHY(4)
+       EXTERNAL_PHY(5)
+       EXTERNAL_PHY(6)
+       EXTERNAL_PHY(7)
+
+       EXTERNAL_PHY(16)
+       EXTERNAL_PHY(17)
+       EXTERNAL_PHY(18)
+       EXTERNAL_PHY(19)
+       EXTERNAL_PHY(20)
+       EXTERNAL_PHY(21)
+       EXTERNAL_PHY(22)
+       EXTERNAL_PHY(23)
+};
+
+&switch0 {
+       ports {
+               SWITCH_PORT_SDS(0, 1, 0, qsgmii)
+               SWITCH_PORT_SDS(1, 2, 0, qsgmii)
+               SWITCH_PORT_SDS(2, 3, 0, qsgmii)
+               SWITCH_PORT_SDS(3, 4, 0, qsgmii)
+               SWITCH_PORT_SDS(4, 5, 1, qsgmii)
+               SWITCH_PORT_SDS(5, 6, 1, qsgmii)
+               SWITCH_PORT_SDS(6, 7, 1, qsgmii)
+               SWITCH_PORT_SDS(7, 8, 1, qsgmii)
+
+               SWITCH_PORT(8, 9, internal)
+               SWITCH_PORT(9, 10, internal)
+               SWITCH_PORT(10, 11, internal)
+               SWITCH_PORT(11, 12, internal)
+               SWITCH_PORT(12, 13, internal)
+               SWITCH_PORT(13, 14, internal)
+               SWITCH_PORT(14, 15, internal)
+               SWITCH_PORT(15, 16, internal)
+
+               SWITCH_PORT_SDS(16, 17, 2, qsgmii)
+               SWITCH_PORT_SDS(17, 18, 2, qsgmii)
+               SWITCH_PORT_SDS(18, 19, 2, qsgmii)
+               SWITCH_PORT_SDS(19, 20, 2, qsgmii)
+               SWITCH_PORT_SDS(20, 21, 3, qsgmii)
+               SWITCH_PORT_SDS(21, 22, 3, qsgmii)
+               SWITCH_PORT_SDS(22, 23, 3, qsgmii)
+               SWITCH_PORT_SDS(23, 24, 3, qsgmii)
+
+               port@24 {
+                       reg = <24>;
+                       label = "lan25";
+                       pcs-handle = <&serdes4>;
+                       phy-mode = "1000base-x";
+                       managed = "in-band-status";
+                       sfp = <&sfp0>;
+               };
+
+               port@26 {
+                       reg = <26>;
+                       label = "lan26";
+                       pcs-handle = <&serdes5>;
+                       phy-mode = "1000base-x";
+                       managed = "in-band-status";
+                       sfp = <&sfp1>;
+               };
+       };
+};
+
+&gpio1 {
+       /delete-node/ poe_enable;
+};