Copy changes from doc/tm.texi to doc/tm.texi.in

	* doc/tm.texi.in (Condition Code Status): Update documention for
	relative locations of cc0-setter and cc0-user.

From-SVN: r208205

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 16c499b05d626327bc113a4580adce5147dda44a..60e7d9e950bf8ec24f3231ee78a1bbb2b6d9e506 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2014-02-27  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * doc/tm.texi.in (Condition Code Status): Update documention for
+       relative locations of cc0-setter and cc0-user.
+
 2014-02-27  Jeff Law  <law@redhat.com>
 
        PR rtl-optimization/52714

diff --git a/gcc/doc/tm.texi.in b/gcc/doc/tm.texi.in
index 50f412cac08da931da498824c2c58c401b56d500..6dcbde45cf29b179757fe34b3154ee103aad98fa 100644 (file)
--- a/gcc/doc/tm.texi.in
+++ b/gcc/doc/tm.texi.in
@@ -4484,8 +4484,13 @@ most instructions do not affect it.  The latter category includes
 most RISC machines.
 
 The implicit clobbering poses a strong restriction on the placement of
-the definition and use of the condition code, which need to be in adjacent
-insns for machines using @code{(cc0)}.  This can prevent important
+the definition and use of the condition code.  In the past the definition
+and use were always adjacent.  However, recent changes to support trapping
+arithmatic may result in the definition and user being in different blocks.
+Thus, there may be a @code{NOTE_INSN_BASIC_BLOCK} between them.  Additionally,
+the definition may be the source of exception handling edges.
+
+These restrictions can prevent important
 optimizations on some machines.  For example, on the IBM RS/6000, there
 is a delay for taken branches unless the condition code register is set
 three instructions earlier than the conditional branch.  The instruction