]> git.ipfire.org Git - thirdparty/kernel/stable.git/commitdiff
arm64: dts: imx93-phycore-som: Add RPMsg overlay
authorPrimoz Fiser <primoz.fiser@norik.com>
Tue, 8 Jul 2025 04:22:03 +0000 (06:22 +0200)
committerShawn Guo <shawnguo@kernel.org>
Fri, 11 Jul 2025 08:34:32 +0000 (16:34 +0800)
Add an overlay used for remote processor inter-core communication
between A55 and M33 cores on the phyCORE-i.MX93 SoM based boards.

Overlay adds the required reserved memory regions and enables the
mailbox unit and the M33 core for RPMsg (Remote Processor Messaging
Framework).

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/Makefile
arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso [new file with mode: 0644]

index e42ac59d40d187403bbd020662f03e5412ab077a..5abff632014c9b76a2f12c38ea98ea3cfe2ec195 100644 (file)
@@ -332,6 +332,10 @@ dtb-$(CONFIG_ARCH_MXC) += imx93-14x14-evk.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-kontron-bl-osm-s.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-nash.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-phyboard-segin.dtb
+
+imx93-phycore-rpmsg-dtbs += imx93-phyboard-nash.dtb imx93-phyboard-segin.dtb imx93-phycore-rpmsg.dtbo
+dtb-$(CONFIG_ARCH_MXC) += imx93-phycore-rpmsg.dtb
+
 dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba91xxca.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxca.dtb
 dtb-$(CONFIG_ARCH_MXC) += imx93-tqma9352-mba93xxla.dtb
diff --git a/arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso b/arch/arm64/boot/dts/freescale/imx93-phycore-rpmsg.dtso
new file mode 100644 (file)
index 0000000..23bede7
--- /dev/null
@@ -0,0 +1,60 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2025 PHYTEC Messtechnik GmbH
+ * Author: Primoz Fiser <primoz.fiser@norik.com>
+ */
+
+/dts-v1/;
+/plugin/;
+
+&{/} {
+       reserved-memory {
+               #address-cells = <2>;
+               #size-cells = <2>;
+
+               rsc_table: rsc-table@2021e000 {
+                       reg = <0 0x2021e000 0 0x1000>;
+                       no-map;
+               };
+
+               vdev0vring0: vdev0vring0@a4000000 {
+                       reg = <0 0xa4000000 0 0x8000>;
+                       no-map;
+               };
+
+               vdev0vring1: vdev0vring1@a4008000 {
+                       reg = <0 0xa4008000 0 0x8000>;
+                       no-map;
+               };
+
+               vdev1vring0: vdev1vring0@a4010000 {
+                       reg = <0 0xa4010000 0 0x8000>;
+                       no-map;
+               };
+
+               vdev1vring1: vdev1vring1@a4018000 {
+                       reg = <0 0xa4018000 0 0x8000>;
+                       no-map;
+               };
+
+               vdevbuffer: vdevbuffer@a4020000 {
+                       compatible = "shared-dma-pool";
+                       reg = <0 0xa4020000 0 0x100000>;
+                       no-map;
+               };
+       };
+};
+
+&cm33 {
+       mbox-names = "tx", "rx", "rxdb";
+       mboxes = <&mu1 0 1>,
+                <&mu1 1 1>,
+                <&mu1 3 1>;
+       memory-region = <&vdevbuffer>, <&vdev0vring0>, <&vdev0vring1>,
+                <&vdev1vring0>, <&vdev1vring1>, <&rsc_table>;
+       status = "okay";
+};
+
+&mu1 {
+       status = "okay";
+};