]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
drm/i915/irq: stop using HAS_GMCH()
authorJani Nikula <jani.nikula@intel.com>
Fri, 2 May 2025 12:07:25 +0000 (15:07 +0300)
committerJani Nikula <jani.nikula@intel.com>
Mon, 12 May 2025 08:17:24 +0000 (11:17 +0300)
Right or wrong, HAS_GMCH() has become a display only thing. The last
three users outside of display are in irq code. Reorder the if ladders
to stop using HAS_GMCH().

Reviewed-by: MichaƂ Grzelak <michal.grzelak@intel.com>
Link: https://lore.kernel.org/r/20250502120725.439800-1-jani.nikula@intel.com
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/i915_irq.c

index 95042879bec4a363b6453b6b379de2fc72ed7d4c..cc05f347555ad9037af2924a07781d524a9f97e0 100644 (file)
@@ -1152,71 +1152,62 @@ void intel_irq_fini(struct drm_i915_private *i915)
 
 static irq_handler_t intel_irq_handler(struct drm_i915_private *dev_priv)
 {
-       if (HAS_GMCH(dev_priv)) {
-               if (IS_CHERRYVIEW(dev_priv))
-                       return cherryview_irq_handler;
-               else if (IS_VALLEYVIEW(dev_priv))
-                       return valleyview_irq_handler;
-               else if (GRAPHICS_VER(dev_priv) == 4)
-                       return i965_irq_handler;
-               else
-                       return i915_irq_handler;
-       } else {
-               if (GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 10))
-                       return dg1_irq_handler;
-               else if (GRAPHICS_VER(dev_priv) >= 11)
-                       return gen11_irq_handler;
-               else if (GRAPHICS_VER(dev_priv) >= 8)
-                       return gen8_irq_handler;
-               else
-                       return ilk_irq_handler;
-       }
+       if (GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 10))
+               return dg1_irq_handler;
+       else if (GRAPHICS_VER(dev_priv) >= 11)
+               return gen11_irq_handler;
+       else if (IS_CHERRYVIEW(dev_priv))
+               return cherryview_irq_handler;
+       else if (GRAPHICS_VER(dev_priv) >= 8)
+               return gen8_irq_handler;
+       else if (IS_VALLEYVIEW(dev_priv))
+               return valleyview_irq_handler;
+       else if (GRAPHICS_VER(dev_priv) >= 5)
+               return ilk_irq_handler;
+       else if (GRAPHICS_VER(dev_priv) == 4)
+               return i965_irq_handler;
+       else
+               return i915_irq_handler;
 }
 
 static void intel_irq_reset(struct drm_i915_private *dev_priv)
 {
-       if (HAS_GMCH(dev_priv)) {
-               if (IS_CHERRYVIEW(dev_priv))
-                       cherryview_irq_reset(dev_priv);
-               else if (IS_VALLEYVIEW(dev_priv))
-                       valleyview_irq_reset(dev_priv);
-               else if (GRAPHICS_VER(dev_priv) == 4)
-                       i965_irq_reset(dev_priv);
-               else
-                       i915_irq_reset(dev_priv);
-       } else {
-               if (GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 10))
-                       dg1_irq_reset(dev_priv);
-               else if (GRAPHICS_VER(dev_priv) >= 11)
-                       gen11_irq_reset(dev_priv);
-               else if (GRAPHICS_VER(dev_priv) >= 8)
-                       gen8_irq_reset(dev_priv);
-               else
-                       ilk_irq_reset(dev_priv);
-       }
+       if (GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 10))
+               dg1_irq_reset(dev_priv);
+       else if (GRAPHICS_VER(dev_priv) >= 11)
+               gen11_irq_reset(dev_priv);
+       else if (IS_CHERRYVIEW(dev_priv))
+               cherryview_irq_reset(dev_priv);
+       else if (GRAPHICS_VER(dev_priv) >= 8)
+               gen8_irq_reset(dev_priv);
+       else if (IS_VALLEYVIEW(dev_priv))
+               valleyview_irq_reset(dev_priv);
+       else if (GRAPHICS_VER(dev_priv) >= 5)
+               ilk_irq_reset(dev_priv);
+       else if (GRAPHICS_VER(dev_priv) == 4)
+               i965_irq_reset(dev_priv);
+       else
+               i915_irq_reset(dev_priv);
 }
 
 static void intel_irq_postinstall(struct drm_i915_private *dev_priv)
 {
-       if (HAS_GMCH(dev_priv)) {
-               if (IS_CHERRYVIEW(dev_priv))
-                       cherryview_irq_postinstall(dev_priv);
-               else if (IS_VALLEYVIEW(dev_priv))
-                       valleyview_irq_postinstall(dev_priv);
-               else if (GRAPHICS_VER(dev_priv) == 4)
-                       i965_irq_postinstall(dev_priv);
-               else
-                       i915_irq_postinstall(dev_priv);
-       } else {
-               if (GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 10))
-                       dg1_irq_postinstall(dev_priv);
-               else if (GRAPHICS_VER(dev_priv) >= 11)
-                       gen11_irq_postinstall(dev_priv);
-               else if (GRAPHICS_VER(dev_priv) >= 8)
-                       gen8_irq_postinstall(dev_priv);
-               else
-                       ilk_irq_postinstall(dev_priv);
-       }
+       if (GRAPHICS_VER_FULL(dev_priv) >= IP_VER(12, 10))
+               dg1_irq_postinstall(dev_priv);
+       else if (GRAPHICS_VER(dev_priv) >= 11)
+               gen11_irq_postinstall(dev_priv);
+       else if (IS_CHERRYVIEW(dev_priv))
+               cherryview_irq_postinstall(dev_priv);
+       else if (GRAPHICS_VER(dev_priv) >= 8)
+               gen8_irq_postinstall(dev_priv);
+       else if (IS_VALLEYVIEW(dev_priv))
+               valleyview_irq_postinstall(dev_priv);
+       else if (GRAPHICS_VER(dev_priv) >= 5)
+               ilk_irq_postinstall(dev_priv);
+       else if (GRAPHICS_VER(dev_priv) == 4)
+               i965_irq_postinstall(dev_priv);
+       else
+               i915_irq_postinstall(dev_priv);
 }
 
 /**