]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
arm64: dts: renesas: r9a09g077: Wire up DMA support for SPI
authorCosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Wed, 28 Jan 2026 21:51:31 +0000 (23:51 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Fri, 6 Mar 2026 12:18:46 +0000 (13:18 +0100)
RZ/T2H (R9A09G077) has three DMA controllers that can be used by
peripherals like SPI to offload data transfers from the CPU.

Wire up the DMA channels for the SPI peripherals.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20260128215132.1353381-3-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
arch/arm64/boot/dts/renesas/r9a09g077.dtsi

index 9d0b4d8d3d5bb1d8910af634ede0557689cb62af..81f6a36e6e72ab9113407e5b59a73c13e19a6736 100644 (file)
                        clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>,
                                 <&cpg CPG_MOD 104>;
                        clock-names = "pclk", "pclkspi";
+                       dmas = <&dmac0 0x267a>, <&dmac0 0x267b>,
+                              <&dmac1 0x267a>, <&dmac1 0x267b>,
+                              <&dmac2 0x267a>, <&dmac2 0x267b>;
+                       dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
                        power-domains = <&cpg>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>,
                                 <&cpg CPG_MOD 105>;
                        clock-names = "pclk", "pclkspi";
+                       dmas = <&dmac0 0x267f>, <&dmac0 0x2680>,
+                              <&dmac1 0x267f>, <&dmac1 0x2680>,
+                              <&dmac2 0x267f>, <&dmac2 0x2680>;
+                       dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
                        power-domains = <&cpg>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>,
                                 <&cpg CPG_MOD 106>;
                        clock-names = "pclk", "pclkspi";
+                       dmas = <&dmac0 0x2684>, <&dmac0 0x2685>,
+                              <&dmac1 0x2684>, <&dmac1 0x2685>,
+                              <&dmac2 0x2684>, <&dmac2 0x2685>;
+                       dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
                        power-domains = <&cpg>;
                        #address-cells = <1>;
                        #size-cells = <0>;
                        clocks = <&cpg CPG_CORE R9A09G077_CLK_PCLKM>,
                                 <&cpg CPG_MOD 602>;
                        clock-names = "pclk", "pclkspi";
+                       dmas = <&dmac0 0x2689>, <&dmac0 0x268a>,
+                              <&dmac1 0x2689>, <&dmac1 0x268a>,
+                              <&dmac2 0x2689>, <&dmac2 0x268a>;
+                       dma-names = "rx", "tx", "rx", "tx", "rx", "tx";
                        power-domains = <&cpg>;
                        #address-cells = <1>;
                        #size-cells = <0>;