7.0-stable patches

added patches:
	series
	x86-cpu-fix-fpdss-on-zen1.patch

diff --git a/queue-7.0/series b/queue-7.0/series
new file mode 100644 (file)
index 0000000..6557283
--- /dev/null
+++ b/queue-7.0/series
@@ -0,0 +1 @@
+x86-cpu-fix-fpdss-on-zen1.patch

diff --git a/queue-7.0/x86-cpu-fix-fpdss-on-zen1.patch b/queue-7.0/x86-cpu-fix-fpdss-on-zen1.patch
new file mode 100644 (file)
index 0000000..4174d9a
--- /dev/null
+++ b/queue-7.0/x86-cpu-fix-fpdss-on-zen1.patch
@@ -0,0 +1,47 @@
+From e55d98e7756135f32150b9b8f75d580d0d4b2dd3 Mon Sep 17 00:00:00 2001
+From: "Borislav Petkov (AMD)" <bp@alien8.de>
+Date: Tue, 7 Apr 2026 11:40:03 +0200
+Subject: x86/CPU: Fix FPDSS on Zen1
+
+From: Borislav Petkov (AMD) <bp@alien8.de>
+
+commit e55d98e7756135f32150b9b8f75d580d0d4b2dd3 upstream.
+
+Zen1's hardware divider can leave, under certain circumstances, partial
+results from previous operations.  Those results can be leaked by
+another, attacker thread.
+
+Fix that with a chicken bit.
+
+Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
+Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
+Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+---
+ arch/x86/include/asm/msr-index.h |    3 +++
+ arch/x86/kernel/cpu/amd.c        |    3 +++
+ 2 files changed, 6 insertions(+)
+
+--- a/arch/x86/include/asm/msr-index.h
++++ b/arch/x86/include/asm/msr-index.h
+@@ -674,6 +674,9 @@
+ #define MSR_AMD64_DC_CFG              0xc0011022
+ #define MSR_AMD64_TW_CFG              0xc0011023
+ 
++#define MSR_AMD64_FP_CFG              0xc0011028
++#define MSR_AMD64_FP_CFG_ZEN1_DENORM_FIX_BIT  9
++
+ #define MSR_AMD64_DE_CFG              0xc0011029
+ #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT  1
+ #define MSR_AMD64_DE_CFG_LFENCE_SERIALIZE     BIT_ULL(MSR_AMD64_DE_CFG_LFENCE_SERIALIZE_BIT)
+--- a/arch/x86/kernel/cpu/amd.c
++++ b/arch/x86/kernel/cpu/amd.c
+@@ -943,6 +943,9 @@ static void init_amd_zen1(struct cpuinfo
+               msr_clear_bit(MSR_K7_HWCR, MSR_K7_HWCR_IRPERF_EN_BIT);
+               clear_cpu_cap(c, X86_FEATURE_IRPERF);
+       }
++
++      pr_notice_once("AMD Zen1 FPDSS bug detected, enabling mitigation.\n");
++      msr_set_bit(MSR_AMD64_FP_CFG, MSR_AMD64_FP_CFG_ZEN1_DENORM_FIX_BIT);
+ }
+ 
+ static const struct x86_cpu_id amd_zenbleed_microcode[] = {