If resaddr != lwarx_resaddr, CR0[EQ] is undefined, and
whether rS is stored is dependent on that value. */
- /* Success? Do the (32bit) store */
+ /* Success? Do the (32bit) store. Mark the store as
+ snooped, so that threading tools can handle it differently
+ if necessary. */
+ stmt( IRStmt_MBE(Imbe_SnoopedStoreBegin) );
storeBE( mkexpr(EA), mkSzNarrow32(ty, mkexpr(rS)) );
-
+ stmt( IRStmt_MBE(Imbe_SnoopedStoreEnd) );
+
// Set CR0[LT GT EQ S0] = 0b001 || XER[SO]
putCR321(0, mkU8(1<<1));
break;
void ppIRMBusEvent ( IRMBusEvent event )
{
switch (event) {
- case Imbe_Fence: vex_printf("Fence"); break;
- case Imbe_BusLock: vex_printf("BusLock"); break;
- case Imbe_BusUnlock: vex_printf("BusUnlock"); break;
- default: vpanic("ppIRMBusEvent");
+ case Imbe_Fence: vex_printf("Fence"); break;
+ case Imbe_BusLock: vex_printf("BusLock"); break;
+ case Imbe_BusUnlock: vex_printf("BusUnlock"); break;
+ case Imbe_SnoopedStoreBegin: vex_printf("SnoopedStoreBegin"); break;
+ case Imbe_SnoopedStoreEnd: vex_printf("SnoopedStoreEnd"); break;
+ default: vpanic("ppIRMBusEvent");
}
}
case Ist_MBE:
switch (stmt->Ist.MBE.event) {
case Imbe_Fence: case Imbe_BusLock: case Imbe_BusUnlock:
+ case Imbe_SnoopedStoreBegin: case Imbe_SnoopedStoreEnd:
break;
default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown");
break;