]> git.ipfire.org Git - thirdparty/kernel/linux.git/commitdiff
media: platform: qcom/iris: add power_off_controller to vpu_ops
authorNeil Armstrong <neil.armstrong@linaro.org>
Thu, 17 Apr 2025 14:59:02 +0000 (16:59 +0200)
committerHans Verkuil <hverkuil@xs4all.nl>
Fri, 2 May 2025 06:52:04 +0000 (08:52 +0200)
In order to support the SM8650 iris33 hardware, we need to provide a
specific constoller power off sequences via the vpu_ops callbacks.

Add the callback, and use the current helper for currently supported
platforms.

Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # x1e Dell
Reviewed-by: Vikash Garodia <quic_vgarodia@quicinc.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil@xs4all.nl>
drivers/media/platform/qcom/iris/iris_vpu2.c
drivers/media/platform/qcom/iris/iris_vpu3.c
drivers/media/platform/qcom/iris/iris_vpu_common.c
drivers/media/platform/qcom/iris/iris_vpu_common.h

index 8f502aed43ce2fa6a272a2ce14ff1ca54d3e63a2..7cf1bfc352d34b897451061b5c14fbe90276433d 100644 (file)
@@ -34,5 +34,6 @@ static u64 iris_vpu2_calc_freq(struct iris_inst *inst, size_t data_size)
 
 const struct vpu_ops iris_vpu2_ops = {
        .power_off_hw = iris_vpu_power_off_hw,
+       .power_off_controller = iris_vpu_power_off_controller,
        .calc_freq = iris_vpu2_calc_freq,
 };
index b484638e6105a69319232f667ee7ae95e3853698..13dab61427b8bd0491b69a9bc5f5144d27d17362 100644 (file)
@@ -118,5 +118,6 @@ static u64 iris_vpu3_calculate_frequency(struct iris_inst *inst, size_t data_siz
 
 const struct vpu_ops iris_vpu3_ops = {
        .power_off_hw = iris_vpu3_power_off_hardware,
+       .power_off_controller = iris_vpu_power_off_controller,
        .calc_freq = iris_vpu3_calculate_frequency,
 };
index fe9896d66848cdcd8c67bd45bbf3b6ce4a01ab10..268e45acaa7c0e3fe237123c62f0133d9dface14 100644 (file)
@@ -211,7 +211,7 @@ skip_power_off:
        return -EAGAIN;
 }
 
-static int iris_vpu_power_off_controller(struct iris_core *core)
+int iris_vpu_power_off_controller(struct iris_core *core)
 {
        u32 val = 0;
        int ret;
@@ -264,7 +264,7 @@ void iris_vpu_power_off(struct iris_core *core)
 {
        dev_pm_opp_set_rate(core->dev, 0);
        core->iris_platform_data->vpu_ops->power_off_hw(core);
-       iris_vpu_power_off_controller(core);
+       core->iris_platform_data->vpu_ops->power_off_controller(core);
        iris_unset_icc_bw(core);
 
        if (!iris_vpu_watchdog(core, core->intr_status))
index 63fa1fa5a4989e48aebdb6c7619c140000c0b44c..f8965661c602f990d5a7057565f79df4112d097e 100644 (file)
@@ -13,6 +13,7 @@ extern const struct vpu_ops iris_vpu3_ops;
 
 struct vpu_ops {
        void (*power_off_hw)(struct iris_core *core);
+       int (*power_off_controller)(struct iris_core *core);
        u64 (*calc_freq)(struct iris_inst *inst, size_t data_size);
 };
 
@@ -22,6 +23,7 @@ void iris_vpu_clear_interrupt(struct iris_core *core);
 int iris_vpu_watchdog(struct iris_core *core, u32 intr_status);
 int iris_vpu_prepare_pc(struct iris_core *core);
 int iris_vpu_power_on(struct iris_core *core);
+int iris_vpu_power_off_controller(struct iris_core *core);
 void iris_vpu_power_off_hw(struct iris_core *core);
 void iris_vpu_power_off(struct iris_core *core);