]> git.ipfire.org Git - thirdparty/linux.git/commitdiff
wifi: rtw89: sar: add skeleton for different configs by antenna
authorZong-Zhe Yang <kevin_yang@realtek.com>
Wed, 26 Mar 2025 02:06:40 +0000 (10:06 +0800)
committerPing-Ke Shih <pkshih@realtek.com>
Mon, 31 Mar 2025 06:26:09 +0000 (14:26 +0800)
Some SAR sources, e.g. ACPI, may allow different SAR configs by antenna.
Previously, the minimum config between antennas was taken. Because there
are differences between HW design, different chips might have different
solutions to achieve this. So, it cannot be done through a single common
handling. Now, add the relevant skeleton for this purpose ahead.

First, add a flag into chip info to describe whether it has implemented
this function or not. Second, support to query SAR config for a given RF
path. With it, each chip can implement its own handling. Then, if a chip
declares to support this function, when it queries SAR config without a
given RF path, it gets a maximum config between antennas.

Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com>
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
Link: https://patch.msgid.link/20250326020643.14487-10-pkshih@realtek.com
drivers/net/wireless/realtek/rtw89/core.h
drivers/net/wireless/realtek/rtw89/phy.h
drivers/net/wireless/realtek/rtw89/rtw8851b.c
drivers/net/wireless/realtek/rtw89/rtw8852a.c
drivers/net/wireless/realtek/rtw89/rtw8852b.c
drivers/net/wireless/realtek/rtw89/rtw8852bt.c
drivers/net/wireless/realtek/rtw89/rtw8852c.c
drivers/net/wireless/realtek/rtw89/rtw8922a.c
drivers/net/wireless/realtek/rtw89/sar.c
drivers/net/wireless/realtek/rtw89/sar.h

index 0789a943074ff2b8a102a3b7b4d5ab3ddad6766a..d49e06f81ba47d14f6e552dbaa1822657dc569e5 100644 (file)
@@ -4284,6 +4284,7 @@ struct rtw89_chip_info {
        bool support_rnr;
        bool support_ant_gain;
        bool support_tas;
+       bool support_sar_by_ant;
        bool ul_tb_waveform_ctrl;
        bool ul_tb_pwr_diff;
        bool rx_freq_frome_ie;
index 518a100375fb3101cf44c814d5b300a196e14803..cafb1a06d7b878d0715cd556ae1c96dc7028935c 100644 (file)
@@ -935,6 +935,20 @@ static inline s8 rtw89_phy_txpwr_dbm_to_mac(struct rtw89_dev *rtwdev, s8 dbm)
        return clamp_t(s16, dbm << chip->txpwr_factor_mac, -64, 63);
 }
 
+static inline s16 rtw89_phy_txpwr_mac_to_rf(struct rtw89_dev *rtwdev, s8 txpwr_mac)
+{
+       const struct rtw89_chip_info *chip = rtwdev->chip;
+
+       return txpwr_mac << (chip->txpwr_factor_rf - chip->txpwr_factor_mac);
+}
+
+static inline s16 rtw89_phy_txpwr_mac_to_bb(struct rtw89_dev *rtwdev, s8 txpwr_mac)
+{
+       const struct rtw89_chip_info *chip = rtwdev->chip;
+
+       return txpwr_mac << (chip->txpwr_factor_bb - chip->txpwr_factor_mac);
+}
+
 void rtw89_phy_ra_assoc(struct rtw89_dev *rtwdev, struct rtw89_sta_link *rtwsta_link);
 void rtw89_phy_ra_update(struct rtw89_dev *rtwdev);
 void rtw89_phy_ra_update_sta(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta,
index 0d482cd57f6eb2b680b46cfb917e0f446b845667..174b90661037b8887d2e941d8888d4a53631e0b4 100644 (file)
@@ -2499,6 +2499,7 @@ const struct rtw89_chip_info rtw8851b_chip_info = {
        .support_unii4          = true,
        .support_ant_gain       = false,
        .support_tas            = false,
+       .support_sar_by_ant     = false,
        .ul_tb_waveform_ctrl    = true,
        .ul_tb_pwr_diff         = false,
        .rx_freq_frome_ie       = true,
index 286334e26c842b8f76ea7f8db248c5b914ae08cd..408c2f7b3eece270873e02715e614a9673265099 100644 (file)
@@ -2217,6 +2217,7 @@ const struct rtw89_chip_info rtw8852a_chip_info = {
        .support_unii4          = false,
        .support_ant_gain       = false,
        .support_tas            = false,
+       .support_sar_by_ant     = false,
        .ul_tb_waveform_ctrl    = false,
        .ul_tb_pwr_diff         = false,
        .rx_freq_frome_ie       = true,
index eceb4fb9880d0884830e1ae399d7f6ddd6bd66d0..47233f0c6ea00308b1e57460c8b79bfa76b9bf14 100644 (file)
@@ -853,6 +853,7 @@ const struct rtw89_chip_info rtw8852b_chip_info = {
        .support_unii4          = true,
        .support_ant_gain       = true,
        .support_tas            = false,
+       .support_sar_by_ant     = false,
        .ul_tb_waveform_ctrl    = true,
        .ul_tb_pwr_diff         = false,
        .rx_freq_frome_ie       = true,
index bbf37442c492181770f819f34cd4d5ff75947019..0903e902d8f4e5f3b6275ac86b9222ad2f5fc741 100644 (file)
@@ -786,6 +786,7 @@ const struct rtw89_chip_info rtw8852bt_chip_info = {
        .support_unii4          = true,
        .support_ant_gain       = true,
        .support_tas            = false,
+       .support_sar_by_ant     = false,
        .ul_tb_waveform_ctrl    = true,
        .ul_tb_pwr_diff         = false,
        .rx_freq_frome_ie       = true,
index 08bcdf2463827f1ab383b9b69a9e77cd9b707649..cbbb6a9169d1f0aa547085aec4d9c0625ae74b32 100644 (file)
@@ -3014,6 +3014,7 @@ const struct rtw89_chip_info rtw8852c_chip_info = {
        .support_unii4          = true,
        .support_ant_gain       = true,
        .support_tas            = true,
+       .support_sar_by_ant     = false,
        .ul_tb_waveform_ctrl    = false,
        .ul_tb_pwr_diff         = true,
        .rx_freq_frome_ie       = false,
index 8082592db84a1da75c5e4022b037752fb92c9a03..5b45c18fbbf6de7c6f20b2d66b324f43285f79c5 100644 (file)
@@ -2823,6 +2823,7 @@ const struct rtw89_chip_info rtw8922a_chip_info = {
        .support_unii4          = true,
        .support_ant_gain       = true,
        .support_tas            = false,
+       .support_sar_by_ant     = false,
        .ul_tb_waveform_ctrl    = false,
        .ul_tb_pwr_diff         = false,
        .rx_freq_frome_ie       = false,
index 120cf2088c9ed8736a9c75fbae58ee2fb5eb24be..d15dafcae39b0a28b1c8def4a9c935ced8b9dba2 100644 (file)
@@ -120,6 +120,7 @@ static int rtw89_query_sar_config_acpi(struct rtw89_dev *rtwdev,
                                       const struct rtw89_sar_parm *sar_parm,
                                       s32 *cfg)
 {
+       const struct rtw89_chip_info *chip = rtwdev->chip;
        const struct rtw89_sar_cfg_acpi *rtwsar = &rtwdev->sar.cfg_acpi;
        const struct rtw89_sar_entry_from_acpi *ent_a, *ent_b;
        enum rtw89_acpi_sar_subband subband_l, subband_h;
@@ -147,7 +148,30 @@ static int rtw89_query_sar_config_acpi(struct rtw89_dev *rtwdev,
 
        cfg_a = rtw89_sar_cfg_acpi_get_min(ent_a, RF_PATH_A, subband_l, subband_h);
        cfg_b = rtw89_sar_cfg_acpi_get_min(ent_b, RF_PATH_B, subband_l, subband_h);
-       *cfg = min(cfg_a, cfg_b);
+
+       if (chip->support_sar_by_ant) {
+               /* With declaration of support_sar_by_ant, relax the general
+                * SAR querying to return the maximum between paths. However,
+                * expect chip has dealt with the corresponding SAR settings
+                * by path. (To get SAR for a given path, chip can then query
+                * with force_path.)
+                */
+               if (sar_parm->force_path) {
+                       switch (sar_parm->path) {
+                       default:
+                       case RF_PATH_A:
+                               *cfg = cfg_a;
+                               break;
+                       case RF_PATH_B:
+                               *cfg = cfg_b;
+                               break;
+                       }
+               } else {
+                       *cfg = max(cfg_a, cfg_b);
+               }
+       } else {
+               *cfg = min(cfg_a, cfg_b);
+       }
 
        if (sar_parm->ntx == RTW89_2TX)
                *cfg -= rtwsar->downgrade_2tx;
@@ -285,6 +309,7 @@ s8 rtw89_query_sar(struct rtw89_dev *rtwdev, const struct rtw89_sar_parm *sar_pa
 
        return rtw89_txpwr_sar_to_mac(rtwdev, fct, cfg);
 }
+EXPORT_SYMBOL(rtw89_query_sar);
 
 int rtw89_print_sar(struct rtw89_dev *rtwdev, char *buf, size_t bufsz,
                    const struct rtw89_sar_parm *sar_parm)
@@ -322,6 +347,8 @@ int rtw89_print_sar(struct rtw89_dev *rtwdev, char *buf, size_t bufsz,
        p += scnprintf(p, end - p, "config: %d (unit: 1/%lu dBm)\n", cfg,
                       BIT(fct));
 
+       p += scnprintf(p, end - p, "support different configs by antenna: %s\n",
+                      str_yes_no(rtwdev->chip->support_sar_by_ant));
 out:
        return p - buf;
 }
index 038a5c0d1e094441325cb7a9fa8edcc953a18641..4b7f3d44f57bf4facc47100c7b5bd7b32455670b 100644 (file)
@@ -13,6 +13,9 @@
 struct rtw89_sar_parm {
        u32 center_freq;
        enum rtw89_ntx ntx;
+
+       bool force_path;
+       enum rtw89_rf_path path;
 };
 
 struct rtw89_sar_handler {